ASIC/FPGA Verification Engineer III

Lockheed Martin•Denver, CA

23h•Onsite

About The Position

Join Our Team as a ASIC/FPGA Verification Engineer where you will work on the development of a sophisticated state-of-the-art avionics product in a world class Integrated Product Development environment. The Silicon Solutions team of Lockheed Martin Space is building the best ASIC/FPGA team in the world, and are seeking a highly talented and motivated ASIC & FPGA Verification Engineer who has a passion in microchip verification. You will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions.

Requirements

ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM.
3+ years professional experience.
Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
Experience in the verification of FPGA and/or ASIC devices.
Experience with modern verification methodologies such as UVM, OVM or VMM.
HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
US Citizenship is required.
Must be able to obtain and maintain a DoD Secret clearance.

Nice To Haves

Experience or coursework in the verification of FPGA and/or ASIC devices.
Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
FPGA/ASIC design experience is a plus.
Experienced in scripting such as Perl, TCL, Python.
Experience leading small teams in technical work, setting priorities, managing schedules
Experience in creating project plans

Responsibilities

Verify designs for low SWaP, radiation hardened, space rated devices.
Devise a unique verification plan for a given design.
Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
Develop test environments & test cases, generate reports, and document verification results.
Work with an independent design team to document and resolve bugs found in the design.
Support the full lifecycle of ASIC and FPGA development.
Support technical reviews, and be able to present to internal and external stakeholders.