APTM Yield Analysis/Device Engineer

Intel CorporationRio Rancho, NM
Hybrid

About The Position

Advanced Packaging Technology and Manufacturing (APTM) Yield Group is looking for a Yield Analysis engineer to join our team tasked with the objective of driving yield, device, and defect improvement across APTM portfolio of packaging technologies. As a yield analysis engineer, the successful candidate will set priorities for the team, get results across boundaries, ensure an inclusive work environment, and demonstrate progress to key yield milestones in technology development and high-volume manufacturing phases. Our job is to understand where our manufacturing processes, test content and inline metrologies need to be improved and fixed. We are looking for engineers who love solving technical problems, are driven to achieve results, and are flexible to adapt to new methods, tools, and fields of study depending on what is needed to solve the problem at hand. You will have access to extremely large datasets and the potential to become a technology expert.

Requirements

  • Bachelor’s degree with 6+ years of relevant experience, or Master’s degree with 4+ years of relevant experience, or PhD degree with 2+ years of relevant experience in Materials Science and Engineering, Mechanical Engineering, Computer Science, Information Systems, Chemical Engineering, Electrical Engineering, Chemistry, Physics, or a closely related field.
  • Data analysis using JMP, Python, or other data engineering and analytics tools.

Nice To Haves

  • In-depth understanding and hands-on application of statistical analysis.
  • Demonstrated proficiency in structured technical problem-solving.
  • Demonstrated understanding of product design/circuit/architecture as relevant for yield analysis.
  • Demonstrated understanding of inline metrology capabilities as relevant for yield analysis.

Responsibilities

  • Extract insights from structured and unstructured data by quickly synthesizing large volumes of data, applying statistical methods and machine learning techniques
  • Develop solutions to problems by utilizing formal education, knowledge of manufacturing process, statistical knowledge, and problem-solving tools
  • Independently drive recommendations and influence the Yield improvement roadmap
  • Good understanding of the relationship between electrical and physical fails including a deep knowledge of FIFA, DFT, Sort/Test, Integration/Process Flow, Datamining, Databases, Data manipulation, and Data visualization.
  • Good understanding of Inline Defect Metrology, detection capabilities, and underlying defect systems in the factory.
  • Developing strong partnerships with diverse groups such as Process Engineering, Integration, QNR, and Product and Test Development Engineering.
  • Preparing detailed, clear, and timely reports summarizing the yield and device health.
  • Owning determining the actions required to deliver Best in Class yield levels.
  • Developing solutions to problems using process, Sort/Test and inline metrology knowledge, statistical knowledge, and problem-solving skills.
  • Work with both upstream, downstream, and cross functional key partners to ensure successful technology development, transfer and ramp of new technology into HVM.

Benefits

  • competitive pay
  • stock bonuses
  • health
  • retirement
  • vacation
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