Analog Design Engineer (custom DRAM circuits)

Normal Computing Corporation•Palo Alto, CA

About The Position

Normal Computing is an applied AI company working on foundational hardware and software for the semiconductor industry, AI infrastructure, and related systems. The company operates across New York City, Mountain View, London, Copenhagen, and Seoul. As an Analog Hardware Engineer, you will build the core mixed-signal technology for Normal Computing’s unconventional computing architecture. You will design analog circuits, including library cells and macros, and work with silicon architecture, digital, and layout teams. The role covers end-to-end analog development, from clean-sheet circuit design through parasitic extraction and silicon bring-up, to help improve throughput per watt.

Requirements

  • Experience developing analog IP from specification to GDSII in modern technologies, including tapeout and bring-up.
  • Experience with memory technologies such as SRAM or DRAM at the core level, including bitcell arrays and peripheral circuits.
  • Experience designing and characterizing custom bitcells in schematic and layout.
  • Fluency with the Cadence flow, including Virtuoso, Spectre, Assembler, extraction, layout, HSMC, and characterization.
  • Deep understanding of noise and variation and their effects on silicon performance and reliability.

Nice To Haves

  • Have led, taped out, and brought up compute-in-memory (CIM) chips.
  • Experience and comfort working in a chip measurement environment for debug and characterization.
  • Experience using AI and/or scripting languages such as Python or Perl to automate design flows and post-process data.

Responsibilities

  • Lead the analog design flow methodology and full analog development cycle, including research and exploratory design.
  • Develop or acquire analog IP for use in Normal Silicon.
  • Acquire or help direct analog EDA tool development.
  • Evaluate memory designs, including SRAM, DRAM, and compute-in-memory (CIM) architectures.
  • Design analog circuits, library cells, and macros in collaboration with silicon architecture, digital, and layout teams.
  • Own analog development from circuit design through parasitic extraction and silicon bring-up.
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