Analog and Mixed-Signal ASIC Design Engineer

Battelle • Columbus, OH

16h • Hybrid

About The Position

Battelle's Advanced Microsystem Solutions Business Line is seeking an experienced Analog and Mixed-Signal ASIC Design Engineer in Columbus, Ohio. The role contributes to the design, analysis, verification, and silicon validation of custom integrated circuits for advanced cybersecurity, trusted hardware, and embedded-system applications. It focuses primarily on analog and mixed-signal circuit design and collaborates with digital design, verification, physical design, and system-integration teams. The successful candidate will have experience delivering analog or mixed-signal ASICs from concept through silicon, including schematic design, simulation, layout review, verification, foundry interaction, and laboratory characterization.

The engineer will design circuits and support development from architecture through tapeout and silicon bring-up. The position also includes verification and signoff, foundry coordination, laboratory test planning and characterization, technical leadership and mentorship, and support for proposal and IRAD activities. The position requires U.S. citizenship and eligibility to obtain and maintain a Top Secret clearance.

Requirements

• Bachelor’s degree in Electrical Engineering or a related field with 3 or more years of relevant experience; a Master’s degree with 1 or more years of relevant experience; or a PhD.
• Demonstrated experience designing analog or mixed-signal integrated circuits that have reached fabrication and silicon validation.
• Strong understanding of CMOS device physics and analog circuit fundamentals.
• Experience with Virtuoso, Spectre, ADE, Pegasus, or Calibre.
• Experience with schematic capture, analog simulation, corner analysis, Monte Carlo analysis, DRC/LVS verification, and post-layout verification.
• Experience working with semiconductor foundries and process design kits (PDKs).
• Understanding of mixed-signal integration challenges, including noise isolation, power integrity, clocking, and substrate coupling.
• Experience leading Work Breakdown Structure (WBS) creation and labor estimates.
• Ability to work independently and in a multidisciplinary environment.
• Ability to organize and follow standard operating procedures and health and safety guidelines.
• Must be a U.S. citizen and eligible to obtain and maintain a Top Secret clearance.

Nice To Haves

• Active Top Secret clearance with SCI eligibility.
• Experience integrating analog IP into larger ASIC or SoC designs.
• Working knowledge of Verilog, Verilog-A, Verilog-AMS, or SystemVerilog.
• Familiarity with digital ASIC implementation and verification flows.
• Experience with timing closure and physical implementation concepts.
• Experience with advanced process nodes.
• Experience designing for radiation tolerance, hardware security, trusted microelectronics, or government applications.
• Strong laboratory skills, including use of an oscilloscope, spectrum analyzer, logic analyzer, and precision measurement equipment.
• Experience with Python, MATLAB, or similar scripting environments.
• Experience leading technical discussions and small IR&D tasks, demonstrating command of the technology and ability to field questions.
• Experience building teams of technical experts with varied skills and facilitating technical discussions with lower-level staff.
• Understanding of business product offerings and experience providing technical expertise during marketing engagements and supporting business development efforts.
• Experience forming technical approaches and generating technical volumes for small proposals with minimal guidance.

Responsibilities

• Design and develop analog and mixed-signal integrated circuits for advanced security and embedded computing applications.
• Perform architecture trade studies and circuit-level design for ADCs, DACs, PLLs, DLLs, bandgap references, LDO regulators, amplifiers, comparators, oscillators, sensor interfaces, and other circuits.
• Develop transistor-level schematics and perform circuit simulation using industry-standard EDA tools.
• Design, implement, and verify analog and mixed-signal circuits from architecture through schematic capture, layout, verification, tapeout, and silicon bring-up.
• Perform and review design verification and signoff, including pre- and post-layout simulation, parasitic extraction, DRC, LVS, ERC, corner analysis, Monte Carlo analysis, noise analysis, electromigration and reliability verification, and foundry tapeout signoff.
• Support mixed-signal integration with digital ASIC and FPGA teams.
• Interface with semiconductor foundries during design, fabrication, and bring-up.
• Develop laboratory test plans and perform silicon characterization and debug.
• Lead technical efforts, mentor junior engineers, and support proposal and IRAD activities.

Benefits

• Compressed work schedule, with most of the team receiving every other Friday off.
• Hybrid work flexibility, with a stated model of 60% in-office and 40% remote, subject to team and position needs.
• Paid time off.
• Medical, dental, and vision coverage with wellness incentives and benefits.
• Optional supplemental benefits.
• Coverage for partners, gender-affirming care and health support, and family formation support.
• 401(k) retirement savings plan: for most employees, Battelle contributes 5% whether or not the employee contributes, and matches employee contributions.
• Tuition assistance for higher education.
• Select funding to pursue ideas in scientific and technological discovery.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level