Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)

General Dynamics Mission Systems, Inc•Scottsdale, AZ

1d•$122,785 - $136,215•Hybrid

About The Position

General Dynamics Mission Systems (GDMS) is seeking an Advanced ASIC FPGA Engineer to join their team. This role involves the full product life cycle of ASIC/FPGA development, from requirements and design to implementation and testing. The engineer will be responsible for definition, design, verification, and documentation of ASIC and/or FPGA developments, determining architecture, system simulation, and detailed design approaches. They will also evaluate the process flow, create and verify test plans, and analyze performance. The position may involve reviewing vendor capabilities, foundry technologies, and simulation tools, as well as participating in the improvement of organizational processes. The engineer will support the generation of technical engineering products, contribute to research and analysis of customer specifications, and select components based on reliability. They may provide leadership to junior employees and independently determine solutions. The role involves planning and executing project tasks for the described activities. The candidate must be knowledgeable in VHDL and/or Verilog RTL coding, proficient in micro-architecture design, and understand digital design concepts and the digital design tool flow (synthesis, timing, place and route, and in-system debug). Collaboration in a team environment and strong communication skills are essential. This position offers a sign-on bonus and has a combined salary range of $122,785.00 - $136,215.00 per year.

Requirements

Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field.
5+ years of job-related experience, or a Master's degree and 3 years of job-related experience.
Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire.
Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information.
U.S. citizenship is required.
Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
Proficient in the principles and techniques of ASIC/FPGA design
Proficient understanding of ASIC/FPGA processes
Proficient knowledge of other related disciplines
Keeps abreast of technology trends
Proficient awareness of business objectives and Engineering’s role in achieving
Proficient in Microsoft Office applications
Proficient in ASIC/FPGA design tools
Proficient written and verbal communications skills
Ability to think creatively
Ability to multi-task
Proficient skill in communicating issues, impacts, and corrective actions
Proficient ability to recognize and clearly report information relevant to sound ASIC/FPGA design
Proficient ability to develop and sell concepts and ideas
Works under limited direction
Must be knowledgeable in VHDL and/or Verilog RTL coding
Must be proficient in micro-architecture design
Successful candidates will have an understanding of digital design concepts
Proficient in the digital design tool flow (synthesis, timing, place and route, and in system debug)
Ability to operate in a team environment and collaborate across the different teams as required to accomplish the design goals
Must have strong written and oral communication skills
Ability to generate micro architecture and detailed design approaches
Proficient in async design principals, timing closure, and constraint generation
Proficiency in HDL (VHDL/Verilog)
Proficiency in scripting languages such as Tcl, Python, or Perl
Effective communication, presentation skills, and high proficiency in technical problem solving
U.S. citizenship with the ability to obtain and maintain a Secret security clearance

Nice To Haves

Leads technical tasks or small projects
Understanding of high reliability design principals
Experience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado, Libero)
Experience with synthesis tools (Precision, Synplify)
Experience with verification tools (QuestaSim/UVM)
Experience with clock-domain-crossing tools (Questa CDC)
Experience with lab bring-up and debug (Oscilloscope, Logic Analyzer, ChipScope)
Active DoD Secret Clearance or higher

Responsibilities

Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
Determines architecture, system simulation and detailed design approach
Defines module interfaces and all aspects of device design and simulation
Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
Creates test and simulation plans that establish functional criteria
Verifies test results and analyzes performance
May also review vendor capabilities, foundry technologies, device libraries and simulation tools
Participates in the improvement of the ASIC/FPGA organizational processes
Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application
Selects components and equipment based on analysis of specifications and reliability
May provide leadership and/or direction to lower level employees
Independently determines approach to solutions
Contributes to the completion of major programs and projects
Plans and executes project tasks for activities described above
Responsible for and participate in the ASIC/FPGA product life cycle (requirements, design, implementation, and test)
Identifies opportunities to apply AI for continuous improvement and innovation