SPE Digital Verification Engineer

Rambus•Johns Creek, GA

6d•Hybrid

About The Position

As a Senior Principal Verification Engineer, the candidate will be reporting to the Director of Verification in this Full-Time position. Successful applicants will have a highly visible role in product development and take ownership of defining and executing verification plans for exciting DDR memory interface products. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems. Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits. At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/. #LI-HYBRID

Requirements

MS EE and 10+ years or PhD EE and 7+ years’ experience of Verification
Significant Experience with coding in System Verilog or Verilog and UVM methodology
Significant Experience with standard ASIC Verification flow/software tools
Strong knowledge of scripting, Linux/Unix environment
Experience in leading and driving technical solutions across organization
The position requires good English written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams

Nice To Haves

Experience working in Analog/Mixed-signal products(DDR,HSS,PCIE etc.) is highly desirable

Responsibilities

Create digital verification plans using datasheets, inputs from engineers/customers, and working closely with system and design engineers.
Implement digital test-benches in SystemVerilog and UVM to apply constrained random stimulus.
Implement UVM reference models to check digital DUT behavior.
Debug issues, Track bugs, functional coverage, and RTL code coverage
Work in a dynamic and interdisciplinary R&D group contributing to flow and methodology development
Mentor junior engineers