SOI Switch Design Engineer MSEE and over 10 years’ experience required, Ph. D. preferred. Demonstrated switch design experience using the SOI process Deep understanding of associated analog and bias circuits Deep understanding of RF device modeling and physics, including device noise parameters and inductor modeling Insights into packaging effects, supply isolations, high-frequency ESD structures, and circuit layout for optimum RF performance Proficient with Cadence Spectre(RF), GoldenGate, and ADS simulation tools (S-parameter, HB, envelope) Experience with EM simulation tools, including HFSS, Clarity, and EMX Layout experience using the Cadence flow, including LVS and DRC Ability to work with CAD engineers and provide guidance on RF and analog layouts
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Job Type
Full-time
Career Level
Mid Level
Education Level
Ph.D. or professional degree