Silicon Technical Lead

DeepMind • Mountain View, CA

1d

About The Position

At Google DeepMind, we've built a unique culture and work environment where long-term ambitious research can flourish. We are seeking a highly motivated and experienced Silicon Technical Lead to join our team and lead the development of groundbreaking silicon for machine learning acceleration. We are seeking a talented and highly motivated Silicon Technical Lead to join our GenAI technical infrastructure research hardware team. You will lead a multi-disciplinary team to define and execute our hardware strategy, manage vendor relationships, and deliver successful silicon tape-outs. This role requires a blend of deep technical expertise, strategic thinking, and strong leadership. We seek out individuals who thrive in ambiguity and who are willing to help out with whatever moves silicon design and architecture forward. We regularly need to invent novel solutions to problems, and often change course if our ideas don’t work out, so flexibility and adaptability to work on any project is a must. We value strong leadership, technical depth, and a collaborative spirit.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 10+ years of experience in ASIC design and development.
• Proven track record of technical leadership and successfully delivering complex silicon projects (tape-outs) to production.
• Deep expertise in at least one core silicon discipline (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow.
• Experience with managing silicon vendors and other external partners.

Nice To Haves

• Master's or Ph.D. in a related field.
• Experience leading and managing teams across the full silicon development cycle, from RTL to bringup.
• Experience with high-performance compute IPs (e.g., GPUs, ML accelerators).
• Knowledge of high-performance and low-power architectures for ML acceleration.
• Excellent communication, and leadership skills.

Responsibilities

• Lead the work of multi-disciplinary silicon engineers, including RTL, Physical Design (PD), Design Verification (DV), and post-silicon bringup.
• Define and drive the end-to-end hardware strategy for next-generation machine learning accelerators.
• Manage relationships and technical execution with silicon vendors, IP providers, and manufacturing partners.
• Drive the team to deliver high-quality silicon on schedule, drawing on a strong history of successful tape-outs.
• Collaborate with architects, software, and systems teams to define product requirements and ensure hardware-software co-design.
• Own technical decision-making for the full ASIC lifecycle, from architecture handover to production.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees