Silicon Packaging Design Engineer

Intel Corporation • Hillsboro, OR

3d • Onsite

About The Position

As an integral part of Intel's new Integrated Device Manufacturer 2.0 (IDM2.0) strategy, we are establishing Foundry Services (FS), a fully vertical, stand-alone foundry business, reporting directly to the CEO. Foundry Services will be a world-class foundry business and major provider of US and European based capacity to serve customers globally. Foundry Services will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IPs. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. Silicon packaging engineering responsibilities include: Drives end-to-end development for mask and panel design from concept through tape out for a given package to produce within the substrate factory. Implements physical layout and routing of the panel design and may help with routing the package. Performs panel substrate fit studies to establish design, performance, and cost tradeoffs. Conducts internal and external reviews, analyzes data, and resolves DRCs to optimize panel design. Completes documentation and collateral into the product lifecycle management system of record.

Requirements

• You must possess the below requirements to be initially considered for this position.
• Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
• Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
• Minimum Qualifications: Bachelor’s degree in electrical engineering or related field with 6+ months of relevant experience.
• Relevant experience must include at least one of the following areas: Valor, Cadence APD, Siemens Xpedition, or CAD software, and readiness to troubleshoot a wide variety of physical design/layout issues.
• Prior experience with physical layout aspects of substrate design/layout including but not limited to custom layouts, floor plans, or schematic layout conversion.

Nice To Haves

• Performing panel routing starting day one.
• Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions.
• Microelectronic package substrate technology development.
• Scripting using Python, VB, C, and/or other language

Responsibilities

• Drives end-to-end development for mask and panel design from concept through tape out for a given package to produce within the substrate factory.
• Implements physical layout and routing of the panel design and may help with routing the package.
• Performs panel substrate fit studies to establish design, performance, and cost tradeoffs.
• Conducts internal and external reviews, analyzes data, and resolves DRCs to optimize panel design.
• Completes documentation and collateral into the product lifecycle management system of record.

Benefits

• We offer a total compensation package that ranks among the best in the industry.
• It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level
• Number of Employees: 5,001-10,000 employees