Senior Technical Program Manager

AlteraSan Jose, CA
23h

About The Position

For decades, Altera has been at the forefront of programmable logic technology, enabling customers to build innovative solutions that transform industries. As we continue to deliver the biggest, fastest, and most advanced FPGAs in the market, execution excellence across hardware, software, and silicon development is critical to our success. We are looking for experienced Technical Program Managers to help drive complex, global engineering programs from concept through production. Altera is seeking a Senior Technical Program Manager to coordinate and drive the engineering execution behind next-generation FPGA device rollouts. In this highly cross-functional role, you will orchestrate complex development efforts spanning silicon, IP, software, firmware, validation, and manufacturing readiness, ensuring alignment across geographically distributed teams in North America and Asia. As a member of Altera’s Execution Alignment Team, you will implement best-in-class program management practices, drive schedule and risk transparency, and ensure successful delivery of industry-leading FPGA products.

Requirements

  • Bachelor’s degree in Electrical Engineering, Software Engineering, Computer Engineering, or a related technical discipline.
  • 10+ years of experience in Technical Program Management, Program Management, or Engineering Program Leadership roles.
  • 8+ years of experience managing complex, cross-functional hardware and software development programs.
  • Proven experience leading programs that integrate silicon, hardware, software, firmware, IP, and validation teams.
  • 7+ years of experience managing programs across multiple organizations and geographically distributed international teams.
  • Strong working knowledge of the full product development lifecycle, including definition, development, verification, sampling, and production rollout.
  • Demonstrated ability to build detailed execution plans, manage dependencies, and drive teams to meet aggressive schedules.
  • Excellent communication, organizational, and stakeholder management skills with the ability to influence without direct authority.
  • Advanced proficiency with project and program management tools used for schedule tracking, risk management, and reporting.

Nice To Haves

  • Master’s degree in Engineering, Computer Science, or a related technical field.
  • 5+ years of experience working directly on FPGA, ASIC, or silicon-based product development programs.
  • Hands-on technical background in silicon design, validation, or software/firmware engineering.
  • Experience supporting silicon bring-up, validation, or manufacturing readiness phases.
  • Familiarity with Agile, hybrid Agile/Waterfall, or scaled execution frameworks in hardware-centric environments.
  • Experience presenting program status and execution metrics to senior leadership and executive stakeholders.

Responsibilities

  • Lead and manage large, complex technical programs supporting FPGA device development from definition through production rollout.
  • Coordinate execution across multiple engineering disciplines including silicon design, IP, software, firmware, validation, and system enablement.
  • Develop and maintain detailed program plans, schedules, milestones, and dependency tracking for multi-threaded development efforts.
  • Drive alignment across global teams in North America and Asia, ensuring clear ownership, accountability, and communication.
  • Identify program risks, critical path issues, and resource constraints; proactively develop and execute mitigation plans.
  • Partner closely with engineering, product management, quality, and operations teams to ensure on-time, high-quality delivery.
  • Implement and continuously improve best-in-class project and program management processes, tools, and reporting mechanisms.
  • Facilitate executive-level communication by providing clear status updates, issue escalation, and data-driven decision support.
  • Support silicon bring-up, validation, sampling, and production readiness milestones by ensuring cross-functional execution alignment.
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