Semiconductor Digital Architect

University of Texas at Austin•Austin, TX

89d•Hybrid

About The Position

The purpose of the Semiconductor Digital Architect is to develop next-generation digital subsystems and compute fabrics for 2.5D/3D microsystems, enabling scalable, high-bandwidth integration across AI, HPC, and wireless acceleration platforms. This includes defining architecture specifications, collaborating with teams to optimize performance, and engaging with semiconductor industry partners to shape ecosystem directions.

Requirements

Master’s of Science in Electrical or Computer Engineering.
12 years of experience in digital or system architecture for SoC/FPGA/ASIC designs, with strong exposure to AI, networking, or HPC accelerators.
Deep expertise in dataflow architectures, memory hierarchies, interconnects, and compute optimization.
Hands-on experience with RTL design/verification (SystemVerilog/VHDL), hardware-software co-design, and FPGA prototyping.
Proficiency in performance modeling and architectural trade-off analysis (SystemC, C++, or Python-based frameworks).
Strong cross-disciplinary collaboration—able to interface with packaging, EDA, and process engineering teams.
Proven record of delivering complex digital design programs from concept through execution.
Location. Austin, Texas is preferred for close collaboration with our engineering teams and partners. Hybrid work arrangements may be possible, with travel up to 30–50% as needed. Any flexible arrangement would be subject to university policies and approval regarding employment laws and regulations.

Nice To Haves

PhD. D in in Electrical or Computer Engineering and ten or more years of experience in digital or system architecture for SoC/FPGA/ASIC designs, with strong exposure to AI, networking, or HPC accelerators.
Prior architecture experience at AI or semiconductor computer companies.
Familiarity with heterogeneous (multi-materials and/or multi-function) compute integration and multi-die packaging (2.5D/3D, hybrid bonding, interposers).
Experience with AI/ML or 5G/6G hardware acceleration, linear algebra, and signal-processing architectures.
Knowledge of interconnect and chiplet standards (BoW, UCIe, CXL, NVLink, UALink) and their ecosystem enablement.
Track record of publications, patents, or industry leadership in digital or system architecture.
Excellent technical writing and presentation skills for cross-functional and customer-facing collaboration.

Responsibilities

Architect next-generation digital subsystems and compute fabrics for 2.5D/3D microsystems—enabling scalable, high-bandwidth integration across AI, HPC, and wireless acceleration platforms.
Define and optimize architecture specifications, dataflows, and interconnect topologies (chiplet fabrics, NoCs, HBM, PCIe/CXL) across heterogeneous dies.
Collaborate with EDA, packaging, and system modeling teams to co-optimize digital architectures for performance, power, and reliability.
Lead system-level modeling and design-space exploration for AI and signal-processing workloads using simulation and prototyping frameworks.
Engage with industry partners and standards bodies (UALink, NVLink Fusion, UltraEthernet, CXL 3.x) to shape ecosystem directions.
Mentor internal design teams on RTL methodologies, IP integration, and verification best practices for multi-die systems.
Translate architectural innovations into roadmaps and reference designs, driving alignment between research, productization, and customer enablement.
Other related functions as assigned.

Benefits

Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
Voluntary Vision, Dental, Life, and Disability insurance options
Generous paid vacation, sick time, and holidays
Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
Flexible spending account options for medical and childcare expenses
Robust free training access through LinkedIn Learning plus professional conference opportunities
Tuition assistance
Expansive employee discount program including athletic tickets
Free access to UT Austin's libraries and museums with staff ID card
Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card