RF / mmWave ATE Test Engineer

Indie Semiconductor-posted 11 days ago

Full-time • Mid Level

Aliso Viejo, CA

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Imagine being part of a team that’s redefining the future of mobility—where your ideas don’t just sit in a lab but power next-generation technology. At indie, we are developing cutting-edge semiconductors, photonics, and radar sensors and systems for automotive, industrial, and adjacent markets. Our innovations are at the heart of advanced intelligent sensing and user experience applications, pushing the boundaries of what’s possible. If you're passionate about groundbreaking technology and want to make a real impact alongside a fast-paced team that thrives on creativity and collaboration, we’d love to have you on board! As an RF / mmWave ATE Test Engineer , you will play a key role in the development, validation, and deployment of test solutions for Radar programs. You’ll collaborate closely with cross-functional teams, including design, product, and process engineering, to ensure robust test coverage, high yield, and smooth integration into high-volume manufacturing. Your expertise in ATE platforms, silicon debug, and data analysis will directly contribute to product quality, production efficiency, and time-to-market. This is a highly technical and impactful role suited for an engineer who thrives in a fast-paced, innovative-driven environment.

Responsible for test program development on Advantest 93K SmartScale / ExaScale for mmWave Automotive Radar ICs.
Develop test programs on Advantest 93K SmartScale / ExaScale for mmWave Automotive Radar ICs.
Design and develop test hardware and test programs for RF/mmWave and mixed-signal applications.
Support DFX implementation for new products in collaboration with Test Architects, Product Development, and Product Engineering.
Summarize debug findings and propose improvements to DFX features and test coverage.
Develop test strategy, test programs, and test hardware for wafer and final test aligned with automotive requirements.
Manage and achieve test engineering milestones.
Contribute to digital and analog test pattern creation, simulation, and tester-dependent vector generation.
Define and develop test methods, procedures, and techniques.
Support development of production and characterization test hardware for ATE application, targeting high test coverage (wafer and final test).
Analyze engineering test data and report results to the team (design, PE, Qual, etc).
Lead the introduction and release of mass-production test software and hardware solutions
Understand new chip features and define appropriate coverage within the target test system.
Serve as first-line debug support to isolate failures (RMAs, qual failures, test escapes, silicon bugs , etc.).

Master’s degree or equivalent in Electrical Engineering or Microwave Engineering and 3+ years of RF/mmWave ATE test engineering experience. Or Bachelor’s degree or equivalent in Electrical Engineering or Microwave Engineering and 5+ years of RF/mmWave ATE test engineering experience.
Hands-on experience with RF/mmWave amplifier, mixer, beamformer, LNA, and power amplifier testing.
Strong understanding of RF measurements such as S-parameters, stability, noise figure (NF), linearity (P1dB), IM3, conversion gain, and multi-channel signal analysis.
Lab experience with network analyzers, signal analyzers, phase noise analyzers, and related RF test equipment.
Experience creating compliance matrices and presenting results.
Ability to identify RF test components based on test methodology.
Exposure to post-silicon validation, silicon bring-up, debug, root cause analysis, product engineering, and foundry interaction.
Strong programming skills for writing and debugging test programs and resolving hardware-related issues.
Proficiency with scripting languages (Python/Perl) and high-level languages (Java/C/C++).
Preferred experience with V93000 SoC Tester – Smartest 8 (preferred) or Smartest 7
Comfortable working primarily in a lab environment with strong experimental and root-cause analysis skills.
Strong data analysis skills and attention to detail.
Knowledge of PCB design, testing, and debugging.

Chip design experience (circuit/physical design, DV, timing closure, power, block-level test correlation).
Post-silicon physical debug (speed-path/Vmin, memory arrays, clocking, yield optimization).
Post-silicon logic debug, including DFX feature analysis, scan-dump/mem-dump, and system-level/DV test suggestions.
Product engineering experience, including ATE coverage, margins, binning, and scan pattern generation.
Familiarity with MIPI protocols.

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