Principle Hardware Design Engineer – Next‑Generation GPU Systems

Hyve Solutions

23h

About The Position

Hyve Solutions designs and delivers industry-leading data center platforms for the world’s largest Cloud and AI infrastructure providers. They partner directly with top Hyperscalers to architect, design, and deploy custom high-performance Server, Storage, and GPU solutions at massive scale. The company's culture thrives on innovation, collaborative engineering, and a relentless drive to push technology forward. This role is part of the team building the next generation of GPU-accelerated AI servers. Hyve Solutions is a leader in the design to worldwide deployment of hyperscale digital infrastructures, leveraging deep-seated industry experience and strong vendor partnerships to design and deliver purpose-built server, storage, and networking solutions to meet datacenter demands for today and beyond. Hyve Solutions is a wholly owned subsidiary of TD SYNNEX Corporation, a leading global distributor and solutions aggregator for the IT ecosystem, helping over 150,000 customers in 100+ countries maximize technology investments.

Requirements

Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field.
10+ years of hardware design experience, including board-level and system-level engineering.
Proven ownership of high-performance server or GPU/accelerator hardware designs from concept through production.
Deep understanding of high-speed interfaces (PCIe Gen5/6, CXL, NVLink, Ethernet), power delivery networks, signal-integrity/PDN design, thermal design, and complex multi-board systems.
Demonstrated success leading EVT/DVT/PVT validation and manufacturing ramp for server-class hardware.
Ability to architect and debug complex interactions across CPUs, GPUs, accelerators, system fabrics, firmware, and rack-level ecosystems.
Expert at working across multi-functional teams, influencing without authority, and representing engineering decisions to both technical leaders and executives.

Nice To Haves

Experience working directly with Hyperscalers or large cloud providers is strongly preferred.

Responsibilities

Lead Next-Generation GPU Server Architecture & Hardware Design
Own the end-to-end hardware design of next-generation GPU servers, including GPU head nodes, system architecture, power delivery, high-speed signaling, management subsystems, and board-level design.
Partner directly with Hyperscalers to translate system-level and hardware requirements into executable engineering specifications and platform architectures.
System Integration & Cross-Subsystem Leadership
Integrate GPU head node designs with GPU subsystems, PCIe/CXL fabrics, high-bandwidth interconnects, and platform management interfaces.
Architect and validate system interactions across compute nodes, accelerator modules, cooling topologies, and rack-level infrastructure.
Drive Full Product Lifecycle Execution
Lead the engineering team through complete hardware development cycles, including schematic design, layout reviews, component selection, signal-integrity/power-integrity analysis, and risk assessment.
Own system bring-up and drive end-to-end platform validation across EVT, DVT, and PVT phases, ensuring performance, reliability, thermal stability, and manufacturability.
Manufacturing Ramp & Datacenter Deployment
Collaborate with Operations, MFG, and Quality teams to scale AI server manufacturing from prototype to high-volume production.
Lead factory readiness, test coverage strategy, issue triage, and corrective-action execution.
Support datacenter deployment at scale, ensuring stable rollout, monitoring readiness, and rapid resolution of system-level issues.
Technical Leadership & Process Excellence
Provide technical leadership to cross-functional hardware teams, mentoring engineers and driving high-quality design methodologies.
Establish best-practice workflows for schematic reviews, documentation, test plans, and system-level validation.
Lead complex debug efforts, performing in-depth root-cause investigations and driving permanent corrective actions across hardware, firmware, and system-integration domains.