Principal Design Verification Engineer

Marvell TechnologySanta Clara, CA
1d

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell switching solutions have been driving a change in networks by delivering a stream of technical innovations through a broad portfolio of segment-focused Ethernet switch product families. Marvell switching technology is powering the next generation of borderless and secure networks. Marvell is addressing the surge of the data economy, data centers provide critical infrastructure from the cloud to the edge. Marvell Prestera and Teralynx switches provide the bandwidth scale for every application with advanced packet processing and analytics to address the most demanding needs. What You Can Expect Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers. Work closely with architects/RTL engineers to bring-up a new architecture/micro-architecture on the verification environment. Develop testbench components in SystemVerilog, UVM, C, and C++. Write tests in SystemVerilog, UVM, C, C++, python to test various logical features in ASIC and SOC design blocks. Debug failures in tests and root cause issues with test environment and design. Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete. Develop tests and tune the environment to achieve coverage goals. Own and debug failures in simulation to root cause problems Architecting, developing, and maintaining tools to streamline the design of state-of-the-art multicore SoCs. Analysis/closure of code and functional coverage. What We're Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience. OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5+ years of experience.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience. OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5+ years of experience.
  • Experience with functional verification techniques.
  • Strong understanding of digital design principles and methodologies.
  • Hands-on experience on using Verilog, System Verilog and C++
  • Understanding of Ethernet networking.
  • Excellent problem-solving and debugging skills.
  • Effective communication and collaboration skills.
  • Ability to work in a fast-paced, dynamic environment.

Responsibilities

  • Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers.
  • Work closely with architects/RTL engineers to bring-up a new architecture/micro-architecture on the verification environment.
  • Develop testbench components in SystemVerilog, UVM, C, and C++.
  • Write tests in SystemVerilog, UVM, C, C++, python to test various logical features in ASIC and SOC design blocks.
  • Debug failures in tests and root cause issues with test environment and design.
  • Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete.
  • Develop tests and tune the environment to achieve coverage goals.
  • Own and debug failures in simulation to root cause problems
  • Architecting, developing, and maintaining tools to streamline the design of state-of-the-art multicore SoCs.
  • Analysis/closure of code and functional coverage.

Benefits

  • Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
  • Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
  • Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
  • We look forward to sharing more with you during the interview process.
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