LTD MIE TMI Integration Engineer

Intel Corporation • Hillsboro, OR

1d • Hybrid

About The Position

At Intel's Logic Technology Development (LTD) we have continued to extend Moore's law to be world leaders in computing technology. To achieve the necessary scaling of our semiconductor manufacturing process, we have led the industry in developing enhancements such as strained silicon for carrier transport enhancement, high-k metal gates, and FINFETs. LTD has been at the center of every new development that has kept Moore's Law moving forward. TMI Integration plays a key role in the development of every new silicon process development. Our analysis builds the plan that allows LTD to take technology from the research phase to the high-volume manufacturing phase while maintaining high quality standards. In the MIE organization, we engineer world-class yields on D1 processes by driving critical Fab and E-Test parameters to Best-in-Class targets. As a TMI Integration engineer, you will be responsible for identifying all the process parameters that impact yield and performance in an advanced silicon process technology. You will characterize the process using cutting-edge metrology tools. With this characterization, you will be responsible for creating a yield cliff parameter improvement roadmap. You will then work directly with modules and TD integration to drive that roadmap by developing and qualifying process fixes. This role provides an opportunity to influence Intel's future process technologies that will keep Moore's Law moving forward.

Requirements

• Must possess a BS with 4+ years of experience, or MS in Computer/Data Science, Physics, Materials Science and Engineering, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Nuclear Engineering, Optics, or Chemistry (with focus on hands-on experimental research).
• An ideal candidate should be willing to demonstrate the below behavioral traits - Strong data analysis and problem debug skills, Excellent communication skills, Understand and adhere to key Intel values.

Nice To Haves

• Minimum of 1 year experience with one or more of the following:
• Materials characterization (SEM, TEM, etc.), materials fabrication, synthesis, metrology, statistical or data analysis (MATLAB, Excel, JMP, etc.)
• Semiconductor processing fundamentals (lithography, wet and or dry etch, chemical and or mechanical polishing, etc.), semiconductor and or transistor device physics, and design of experiments.
• Demonstrate experience of Statistical Process Control SPC or Design of Experiments (DOE) principles.

Responsibilities

• Provide navigation and leadership to meet Intel's yield objectives.
• Organizing and presenting process parameter summaries to LTD engineering teams.
• Partnering with Intel TD Integration, Yield, and Module engineers to drive root cause understanding for all critical process parameters.
• Institute ramp to manufacturing volumes to demonstrate the technology meets requirements while simultaneously transferring the technology to counterparts in manufacturing via the Copy Exactly Methodology.
• Hold the team and collaborators accountable for quality through TMIs and FTs.
• Role-model and establish a team culture of trust, collaboration, safety, accountability, and excellence.
• Build strong relationships with other LTD process and design teams based on mutual trust and respect.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees