Global SOC Design Engineer
About The Position
This individual possesses the solid engineering fundamentals and understanding with some supervision focusing on the functional verification of System-on-Chip (SoC) and IP modules, applying ASIC verification techniques under guidance to ensure chip designs meet functional, performance, reliability, and low-power requirements. The individual develops and executes verification plans, designs test cases, and utilizes verification tools from EDA vendors and languages (e.g., SystemVerilog, UVM) to perform simulations and debugging, including verification of low-power designs using Unified Power Format (UPF). Supports the creation of architectures, circuit specifications, logic designs, and system simulations based on systemlevel requirements to enable IP (block/SoC) development for high-performance, high-quality, low-power products. Collaborates with team members to develop implementation strategies that meet system requirements and customer needs. Participates in the evaluation of design and verification workflows, including timing and power use, to ensure robust SoC functionality. Utilizes EDA tools to support verification and design validation of specific SoC components. Applies understanding of semiconductor materials (e.g., dielectric materials, metal interconnects) and associated fabrication processes (e.g., chemical vapor deposition, etching) to evaluate the electrical performance and thermal stability of SoC components. Verifies lowpower designs using UPF to ensure power management features are aligned with semiconductor process characteristics. Identifies and analyzes verification failures potentially related to materials behavior or process-induced anomalies to support design improvements. Evaluates the influence of semiconductor material properties and emerging fabrication methods on SoC functionality and power consumption. Employs tools and applications (e.g., RTL to GDS Flow, Virtuoso) to facilitate design and verification activities for specific SoC or IC package components. Prepares technical documentation for EDA/IP/ASIC projects, including verification reports and development documentation. Actively contributes to design reviews and project meetings, offering verification results, design insights, and recommendations for improvement. Participates at design reviews and project meetings.
Requirements
- Solid engineering fundamentals and understanding
- Experience with functional verification of System-on-Chip (SoC) and IP modules
- Experience applying ASIC verification techniques
- Experience developing and executing verification plans
- Experience designing test cases
- Experience utilizing verification tools from EDA vendors and languages (e.g., SystemVerilog, UVM) to perform simulations and debugging
- Experience with verification of low-power designs using Unified Power Format (UPF)
- Understanding of semiconductor materials (e.g., dielectric materials, metal interconnects) and associated fabrication processes (e.g., chemical vapor deposition, etching)
- Experience with EDA tools to support verification and design validation of specific SoC components
- Experience with tools and applications (e.g., RTL to GDS Flow, Virtuoso) to facilitate design and verification activities for specific SoC or IC package components
- Bachelor's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science, Chemical Engineering or related degree field
Responsibilities
- Functional verification of System-on-Chip (SoC) and IP modules
- Develop and execute verification plans
- Design test cases
- Utilize verification tools from EDA vendors and languages (e.g., SystemVerilog, UVM) to perform simulations and debugging
- Verification of low-power designs using Unified Power Format (UPF)
- Support the creation of architectures, circuit specifications, logic designs, and system simulations based on systemlevel requirements
- Collaborate with team members to develop implementation strategies that meet system requirements and customer needs
- Participate in the evaluation of design and verification workflows, including timing and power use
- Utilize EDA tools to support verification and design validation of specific SoC components
- Apply understanding of semiconductor materials and associated fabrication processes to evaluate the electrical performance and thermal stability of SoC components
- Verify lowpower designs using UPF to ensure power management features are aligned with semiconductor process characteristics
- Identify and analyze verification failures potentially related to materials behavior or process-induced anomalies to support design improvements
- Evaluate the influence of semiconductor material properties and emerging fabrication methods on SoC functionality and power consumption
- Employ tools and applications (e.g., RTL to GDS Flow, Virtuoso) to facilitate design and verification activities for specific SoC or IC package components
- Prepare technical documentation for EDA/IP/ASIC projects, including verification reports and development documentation
- Actively contribute to design reviews and project meetings
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What This Job Offers
Job Type
Full-time
Career Level
Entry Level
