ASIC/SoC Design Engineer

Advanced Micro Devices, Inc • San Jose, CA

4h

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:
AMD is looking for motivated individuals seeking opportunities to solve complex problems in a fast-paced work environment. Successful candidate will be involved in the microarchitectural design and RTL implementation of Adaptive SoC and FPGA configuration system.
THE PERSON:
You are passionate about complex Adaptive SoC and FPGA Configuration solutions and thrive in environments that require cross-domain expertise. You have strong/effective communication skill, excellent analytical and problem-solving skills. You excel at collaborating across hardware and software teams and can influence architecture decisions for next-generation configuration solutions.

Requirements

• Proven background experiences in ASIC design.
• Knowledge of industry-standard on-chip interconnect protocols (AMBA AXI/AXI-S/APB)
• Experienced with Verilog, System Verilog, SystemVerilog Assertions (SVA)
• Proficiency in writing and debugging SDC timing constraints, including multi-cycle paths, false paths, and clock domain crossing constraints
• Experience in industry-standard ASIC CAD tools for simulation, synthesis, STA, LINT, LEC, CDC, RDC and power estimation, etc.
• Experience in designs with multiple power domains and UPF
• Proficiency with scripting languages like Perl, Python and Makefile
• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering

Nice To Haves

• System level knowledge is a plus for supporting complex customer configuration issues

Responsibilities

• Author detailed micro-architecture specification and own RTL implementation of next-gen FPGA Configuration controller.
• Collaborate with hardware, firmware, and software teams to ensure a robust and cohesive configuration solution.
• Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation.
• Integrate complex configuration blocks into full-chip environment, ensuring proper connectivity, clock domain crossings, power domain crossing
• Partner with verification teams to ensure comprehensive functional coverage.
• Work closely with test engineers to implement design-for-test (DFT) and special FPGA test features to reduce test time and improve coverage
• Drive performance, power, and area (PPA) optimization for configuration/control paths
• Work with the Physical Design team to ensure proper implementation of the design

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level