ASIC SoC Verification Engineer

EricssonAustin, TX
1d$117,000 - $175,000Onsite

About The Position

A long-time telecommunications industry leader, Ericsson is embarking on new endeavors that have led to the opening of a development center in the heart of downtown Austin. Ericsson Austin is rooted in the legacy of Ericsson, while providing a local subculture and vibe that is uniquely Austin. Hardware and software products currently being developed in Austin will be instrumental in the global mobile telecommunications infrastructure and will enable the processing power necessary to deliver on the promise of a digitally connected society. At Ericsson Austin, we employ leading-edge tools and methodologies, and we develop leading-edge technology. We challenge each other, execute at a healthy pace, and set the quality bar high. We do all this while valuing individual balance and respecting every individual's contribution and unique perspectives. Ericsson Austin is looking for an ASIC SOC Design Verification Engineer to join a growing world-class semiconductor development organization and to help drive excellence in our 5G/6G network products. In this role, you will architect and implement extensible and modular SoC-level test benches (promoting IP and sub-system reuse where beneficial). You will also develop and execute SoC verification plans. In addition, you will be responsible for defining and enforcing requirements for IP verification component development to optimize component interoperability across environments.

Requirements

  • Master's degree in engineering (or equivalent)
  • Several years of functional verification experience spanning environment levels, including directed and pseudo-random embedded-C chip or subsystem environments, constrained-random block and subsystem environments, and coverage-driven environments
  • Experience developing reusable and highly integrated DV components (e.g. transaction generators, drivers/monitors, sequencers, scoreboards, protocol checkers)
  • Experience constructing chip-level System Verilog and UVM test bench environments
  • Experience with successful verification planning (e.g. testbench partitioning, assertions versus coverage decisions, block versus chip-level tradeoffs)
  • Rich knowledge of verification tools and methodologies, with a strong desire to drive continuous improvements based on industry trends
  • Excellent debug skills, with extensive experience debugging RTL in block and chip-level environments
  • Strong verbal and written technical communication skills

Nice To Haves

  • Experience leading and mentoring other DV engineers
  • Experience writing System Verilog Assertions (SVAs)

Responsibilities

  • Architect and implement extensible and modular SoC-level test benches (promoting IP and sub-system reuse where beneficial)
  • Develop and execute SoC verification plans
  • Responsible for defining and enforcing requirements for IP verification component development to optimize component interoperability across environments

Benefits

  • The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate's combination of job-related knowledge, qualifications, skills, education, training, and experience.
  • Base pay range $117,000 to $175,000
  • Short-Term Variable Compensation Plan: Your pay also includes the opportunity for an annual bonus. Actual bonus payouts are based on performance of the business against the unit's objectives, individual performance, and the individual bonus target. Certain eligibility and pro-ration rules apply.
  • Ericsson offers excellent health benefits including the choice of three medical plan options and a dental plan option that allow an employee to select the level of coverage that suits their needs. Employees will receive company credits in an amount equal to the cost that Ericsson pays toward the cost of their medical and dental premiums for themselves and eligible covered dependents.
  • The Ericsson US 401(k) Plan offers an automatic 3% company contribution and Ericsson matches $1 for every $1 you put into the 401(k) Plan on the first 3% of your eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay. When you contribute at least 5% of eligible pay, you are receiving Ericsson's full matching contributions. Matching and company automatic contributions stop when your total eligible pay for the year reaches the IRS limits.
  • Employees will also receive company credits in an amount equal to the cost of basic life insurance and basic accidental death and dismemberment coverage, as well as short-term and long-term disability coverage.
  • Employees also have the option to participate in Ericsson's Stock Purchase Plan.
  • New employees are provided a minimum of 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually. Please note paid time off is pro-rated based on the employee's start date.
  • Ericsson provides up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay.
  • Ericsson offers many other company-paid benefits such as financial wellness programs, educational assistance, matching gifts, and recognition programs.
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