Director, NVME SSD Host Interface Triage

EverpureSanta Clara, CA
Onsite

About The Position

We’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As the PCIe Triage Engineering Leader for our Datastore team, you will be the technical linchpin ensuring the stability of our next-generation, high-performance storage solutions. You will lead the charge in deconstructing complex interface failures, bridging the gap between hardware design, firmware, and manufacturing to deliver industry-leading reliability. This isn't just about finding bugs; it’s about architecting the diagnostic standards that allow Pure to push the boundaries of Gen5 and Gen6 technologies at scale.

Requirements

  • Over 5 years of experience in Demonstrated success in chip bring-up and product qualification.
  • Hands on working experience on Gen5 and Gen6.
  • Comprehensive end-to-end expertise in PCIe operation, including the ability to evaluate host-side drivers and device-side firmware to efficiently troubleshoot issues.
  • Proficient with test equipment, including PCIe analyzer, PCIe exerciser, PCIe jammer, and I2C analyzer.
  • Experience with PCIe compliance testing (SIG) for SSD products.
  • Detail-oriented, analytical, process-driven, and customer-focused.
  • Thrive in fast-paced, evolving business environments.
  • Clear and effective communicator, both verbally and in writing.
  • BS in Electrical or Computer Engineering (or related field).

Nice To Haves

  • Background in collaborating with hyperscale customers.
  • Skilled in SSD development, qualification, and customer support.
  • Familiar with NVMe architecture and implementation.

Responsibilities

  • Own and drive the triage, root cause analysis, and resolution of issues raised by internal teams, manufacturing, and JDM partners.
  • Lead failure analysis and root cause investigations to support field issues and customer escalations.
  • Ensure clear documentation and provide regular updates to stakeholders throughout the triage-to-resolution lifecycle.
  • Guide the development of PCIe, NVMe, SMBus, and I2C validation test plans for early-phase silicon bring-up and regression testing across the development lifecycle.
  • Leverage automation and AI to streamline and improve issue triage.
  • Provide technical leadership and mentorship to junior engineers.

Benefits

  • Innovation: We celebrate those who think critically, like a challenge, and aspire to be trailblazers.
  • Growth: We give you the space and support to grow along with us and to contribute to something meaningful. We have been named Fortune's Best Workplaces in Technology™, Fortune's Best Workplaces in the Bay Area™, and certified as a Great Place to Work®!
  • Team: We build each other up and set aside ego for the greater good.
  • flexible time off
  • wellness resources
  • company-sponsored team events
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