Design for Test Engineer - Early Career

Marvell TechnologyWestborough, MA

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Design for Test (DFT) Engineer supports the development and implementation of testability features in digital integrated circuits to ensure high product quality and manufacturability. This role is ideal for recent graduates or early‑career engineers interested in VLSI design, silicon validation, and semiconductor manufacturing flows.

Requirements

  • Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field with 1- 2 years of related experience OR a Master’s Degree in Electrical Engineering, Computer Engineering, or a related field
  • Basic understanding of digital logic design and computer architecture
  • Familiarity with DFT concepts, such as: scan chains, ATPG (Automatic Test Pattern Generation), and fault models
  • Exposure to HDL languages (Verilog or VHDL)
  • Fundamental knowledge of ASIC or SoC design flow
  • Strong attention to detail, analytical and problem‑solving skills
  • Ability to work collaboratively in a team environment

Nice To Haves

  • Academic or internship experience in semiconductor design or testing
  • Basic scripting knowledge (Python, Tcl, or Shell)
  • Familiarity with EDA tools
  • Understanding of manufacturing test flows and yield analysis
  • Exposure to low‑power or high‑speed design considerations

Responsibilities

  • Assist in implementing DFT structures such as scan chains, boundary scan (JTAG), and Built‑In Self‑Test (BIST)
  • Support scan insertion and verification using industry‑standard EDA tools
  • Generate scripts that support automation of DFT flows
  • Collaborate with design, verification, and physical design teams to ensure testability requirements are met
  • Help analyze test coverage metrics (e.g., stuck‑at, transition, path delay faults)
  • Identify and assist in debugging DFT‑related issues during simulation, synthesis, and post-silicon testing
  • Contribute to documentation of DFT methodologies, guidelines, and test results
  • Learn and follow company design and test best practices

Benefits

  • Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
  • Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
  • Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
  • We look forward to sharing more with you during the interview process.
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