ASIC Design Verification Engineer

CiscoSan Jose, CA
1dOnsite

About The Position

This role requires being onsite in San Jose, CA at least 4 days/week. Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and café, social interest groups, and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact Set vision and strategy for ASIC verification methodology and execution across multiple programs and product lines. Serve as technical authority and mentor for verification teams, fostering technical excellence and innovation. Lead architecture and implementation of scalable, reusable verification infrastructure and methodologies. Drive cross-functional initiatives to improve verification efficiency, quality, and coverage at scale. Influence ASIC architecture and design to enable robust verification and high-quality silicon. Serve as subject matter expert and advisor on industry trends, best practices, and new technologies. Provide technical leadership in root cause analysis and resolution of complex issues during bring-up and post-silicon validation.

Requirements

  • Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience.
  • Experience in System Verilog, UVM, and verification methodologies including emulation.
  • Experience architecting verification strategies for complex ASIC programs.
  • Experience leading verification teams or projects.
  • Experience in scripting (Python, Perl) and C/C++ programming language.

Nice To Haves

  • Experience in data center, Hyperscalers, or AI Networking technologies.
  • Author or contributor to industry standards or best practices in ASIC verification.
  • Deep expertise in multiple protocols and large-scale SoC architectures.
  • Experience with advanced emulation, prototyping, and formal verification tools at scale.
  • Experience with silicon bring-up and post-silicon debug.
  • Strong leadership, communication, and mentoring skills.

Responsibilities

  • Set vision and strategy for ASIC verification methodology and execution across multiple programs and product lines.
  • Serve as technical authority and mentor for verification teams, fostering technical excellence and innovation.
  • Lead architecture and implementation of scalable, reusable verification infrastructure and methodologies.
  • Drive cross-functional initiatives to improve verification efficiency, quality, and coverage at scale.
  • Influence ASIC architecture and design to enable robust verification and high-quality silicon.
  • Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.
  • Provide technical leadership in root cause analysis and resolution of complex issues during bring-up and post-silicon validation.
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