ASIC Design Verification Engineer

Cisco • San Jose, CA

2d

About The Position

As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You’ll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips. Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco’s hardware platforms. You will:
Participate in the ASIC design verification for Cisco high-end switching products.
Perform end-to-end verification of design blocks and top-level
Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
Construct testbenches components like scoreboard, agents, sequencers, and monitors.
Collaborate with the hardware, software designers, and vendors.

Requirements

• Bachelor's degree in electrical/computer science/computer engineering/related degree and 5+ years of related experience or Master's in electrical/computer science/computer engineering/related degree and 3+ years of related experience, or PhD in electrical/computer science/computer engineering/related degree + 0 years of related experience.
• Prior experience in System Verilog and UVM.
• Experience with ASIC design and verification processes, debugging, methodology, and tools.
• Experience in verifying blocks/clusters or full chip level for ASIC.
• Hands on debugging experience.

Nice To Haves

• Experience with Linux, C/C++, and/or Python/Perl.
• Prior experience in emulation.
• Post-silicon lab bring-up experience.
• Experience in Networking.
• Experience with Formal verification.

Responsibilities

• Participate in the ASIC design verification for Cisco high-end switching products.
• Perform end-to-end verification of design blocks and top-level
• Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
• Construct testbenches components like scoreboard, agents, sequencers, and monitors.
• Collaborate with the hardware, software designers, and vendors.

Benefits

• U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance.
• Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
• U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer
• For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level