Principal ASIC Design Verification Engineer

BLUE ORIGINLos Angeles, CA
$230,773 - $323,082

About The Position

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! - The Principal ASIC Verification Engineer serves as a technical authority for verification of advanced ASICs enabling Space based communication systems. This role sets verification strategy across one or more silicon programs and ensures robust methodologies for functionally complex, high-performance communication hardware.

Requirements

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field.
  • 12+ years of ASIC/SoC verification experience.
  • Expert-level knowledge of System Verilog, UVM, assertions, and verification signoff methodology.
  • Proven success leading verification for complex chips or multiple tape-outs.
  • Strong understanding of communication signal-processing hardware and system-level integration.
  • Excellent technical leadership and cross-organizational communication skills.

Nice To Haves

  • Deep expertise in Space based communications, digital modems, phased-array processing, or payload processing.
  • Experience with formal property verification, emulation, and performance validation.
  • Familiarity with fault tolerance, mission-critical reliability, or radiation-aware verification considerations.
  • Experience with architectural modeling and verification planning for hardware/software partitioned systems.
  • Strong record of technical innovation and process improvement.

Responsibilities

  • Define end-to-end verification strategy for large Space based communication ASIC or SoC programs.
  • Establish verification methodologies, infrastructure, and signoff criteria across block, subsystem, and SoC levels.
  • Lead verification planning for complex communication functions such as modem pipelines, FEC engines, digital beamforming, packet processing, and control fabrics.
  • Drive alignment among design, architecture, systems, firmware, and validation teams.
  • Evaluate verification completeness through coverage, assertions, formal analysis, emulation, and silicon correlation.
  • Resolve critical technical issues and direct root-cause analysis for the most complex functional failures.
  • Guide development of reusable VIP, reference models, and regression automation frameworks.
  • Mentor technical leaders and raise the overall verification maturity of the organization.
  • Influence future verification roadmap, tool strategy, and reuse models.

Benefits

  • Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
  • Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
  • Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results, or other factors at the company's sole discretion.
  • Bonus amounts and eligibility are not guaranteed and subject to change and cancellation.
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