ASIC Architect
About The Position
The Rack Scale Switching Architecture team defines the architectural framework for data center switch ASICs, as well as other intra‑rack and inter‑rack scale components. Rack scale networking is among the fastest‑growing segments in both the technology industry and Marvell’s business, as it underpins the performance of AI training and inference workloads. As a technology leader in this domain, Marvell develops products that are deployed by leading AI infrastructure providers worldwide. The ASIC Architect serves as a senior technical leader within the company, guiding the evolution of capabilities across our leading‑edge SoCs and driving innovation to sustain the company’s technology leadership. This role encompasses end‑to‑end ownership of the hardware architecture throughout the full lifecycle of our SoC products.
Requirements
- 15+ years of experience with a Master’s degree, or 10+ years of experience with a PhD, in Electrical Engineering and Computer Engineering.
- Demonstrated excellence in written and verbal communication, with the ability to clearly articulate complex architectures and algorithms in technical documents and presentations.
- Exceptional creativity and problem‑solving ability in developing optimal architectural solutions for ASIC products.
- Proven track record of successfully delivering ASIC product architectures, including comprehensive architecture documentation and pseudocode.
- Proven track record of successfully guiding design and verification teams to complete the implantation of ASIC products.
- Solid understanding of industry‑standard interconnect protocols, such as PCIe, CXL, UALink, and Ethernet.
Nice To Haves
- Extensive experience in ARM CPU subsystem architecture, including memory subsystem and cache subsystems is desirable.
- Good working knowledge of ASIC security including root-of-trust, TEE, data encryption and access control is desirable.
Responsibilities
- Collaborate with our marketing and business development teams to identify use cases with impactful value for customers.
- Collaborate with all the technical teams (Design, Verification, Physical Design, Systems, Software) to deliver new SoC architecture features and define the Soft/Hardware co-designs.
- Conduct detailed performance analyses of architectural features and applications, evaluating power‑performance‑area trade‑offs.
- Apply performance modeling techniques to analyze complex use cases where appropriate.
- Apply domain expertise across one or more areas, including Embedded CPU Subsystems, PCIe Interconnect, CXL Interconnect, Ethernet Interconnect, UALink Interconnect, Data Network Switching, and Platform Security.
- Be responsible for authoring detailed architecture specifications and defining robust validation plans.
- Participate in different industry workgroups, including PCI-SIG, CXL, UALink, OCP, JEDEC, DMTF and other HPC and AI workgroups.
- File patent applications for novel technologies developed within our architectures.
- Provide post-silicon production support with silicon debug and publishing of customer documentation.
Benefits
- Exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
- Offerings built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
- Employee stock purchase plan with a 2-year look back.
- Family support programs to help balance work and home life.
- Robust mental health resources to prioritize emotional well-being.
- Recognition and service awards to celebrate contributions and milestones.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Number of Employees
1,001-5,000 employees
