ASIC Architect

Marvell Technology•Santa Clara, CA

12d•$191,530 - $286,900

About The Position

The ASIC Architect serves as a senior technical leader within the company, guiding the evolution of capabilities across our leading-edge SoCs and driving innovation to sustain the company’s technology leadership. This role encompasses end‑to‑end ownership of the hardware architecture throughout the full lifecycle of our SoC products. You will collaborate with our marketing and business development teams to identify use cases with impactful value for customers. You will collaborate with all the technical teams (Design, Verification, Physical Design, Systems, Software) to deliver new SoC architecture features and define the Soft/Hardware co-designs. You will conduct detailed performance analyses of architectural features and applications, evaluating power‑performance‑area trade‑offs. Where appropriate, you will apply performance modeling techniques to analyze complex use cases. You will apply your domain expertise across one or more areas, including Embedded CPU Subsystems, PCIe Interconnect, CXL Interconnect, Ethernet Interconnect, UALink Interconnect, Data Network Switching, and Platform Security. You will be responsible for authoring detailed architecture specifications and defining robust validation plans. You will participate in different industry workgroups, including PCI-SIG, CXL, UALink, OCP, JEDEC, DMTF and other HPC and AI workgroups. You will file patent applications for novel technologies developed within our architectures. You will provide post-silicon production support with silicon debug and publishing of customer documentation.

Requirements

15+ years of experience with a Master’s degree, or 10+ years of experience with a PhD, in Electrical Engineering and Computer Engineering.
Demonstrated excellence in written and verbal communication, with the ability to clearly articulate complex architectures and algorithms in technical documents and presentations.
Exceptional creativity and problem-solving ability in developing optimal architectural solutions for ASIC products.
Proven track record of successfully delivering ASIC product architectures, including comprehensive architecture documentation and pseudocode.
Proven track record of successfully guiding design and verification teams to complete the implantation of ASIC products.
Solid understanding of industry-standard interconnect protocols, such as PCIe, CXL, UALink, and Ethernet.

Nice To Haves

Extensive experience in ARM CPU subsystem architecture, including memory subsystem and cache subsystems.
Good working knowledge of ASIC security including root-of-trust, TEE, data encryption and access control.

Responsibilities

End-to-end ownership of the hardware architecture throughout the full lifecycle of our SoC products.
Collaborate with marketing and business development teams to identify use cases with impactful value for customers.
Collaborate with technical teams (Design, Verification, Physical Design, Systems, Software) to deliver new SoC architecture features and define Soft/Hardware co-designs.
Conduct detailed performance analyses of architectural features and applications, evaluating power-performance-area trade-offs.
Apply performance modeling techniques to analyze complex use cases.
Apply domain expertise across areas including Embedded CPU Subsystems, PCIe Interconnect, CXL Interconnect, Ethernet Interconnect, UALink Interconnect, Data Network Switching, and Platform Security.
Author detailed architecture specifications and define robust validation plans.
Participate in industry workgroups, including PCI-SIG, CXL, UALink, OCP, JEDEC, DMTF and other HPC and AI workgroups.
File patent applications for novel technologies developed within our architectures.
Provide post-silicon production support with silicon debug and publishing of customer documentation.