Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world, enabling new possibilities across enterprise, cloud and AI, and carrier architectures. Marvell is a place to thrive, learn, and lead for those looking to make their mark on purposeful and enduring innovation. The Rack Scale Switching Architecture team defines the architectural framework for data center switch ASICs, as well as other intra-rack and inter-rack scale components. Rack scale networking is a fast-growing segment in both the technology industry and Marvell’s business, underpinning the performance of AI training and inference workloads. As a technology leader, Marvell develops products deployed by leading AI infrastructure providers worldwide. The ASIC Security Architect serves as a senior technical leader within the company, guiding the evolution of capabilities across leading-edge SoCs and driving innovation to sustain the company’s technology leadership. This role encompasses end-to-end ownership of the hardware architecture throughout the full lifecycle of SoC products. You will collaborate with marketing and business development teams to identify use cases with impactful value for customers, and with all technical teams (Design, Verification, Physical Design, Systems, Software) to deliver new SoC architecture features and define Soft/Hardware co-designs. You will conduct detailed performance analyses of architectural features and applications, evaluating power-performance-area trade-offs, and apply performance modeling techniques to analyze complex use cases where appropriate. You will apply your domain expertise across one or more areas, including Platform Security, Silicon Root-of-Trust, Trusted Computing, Embedded CPU Subsystems, and Data Network Switching. You will be responsible for authoring detailed architecture specifications and defining robust validation plans. You will participate in different industry workgroups, including TCG, OCP, DMTF, Caliptra, PCI-SIG, CXL, UALink, and other HPC and AI workgroups, and will file patent applications for novel technologies developed within our architectures.
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Job Type
Full-time
Career Level
Senior