Advanced Package Technology Engineer

Broadcom•San Jose, CA

9d•$108,000 - $192,000

About The Position

As part of WW ASIC product development team, this individual will work closely with silicon & package design, marketing, NPI, assembly/substrate suppliers & customers and is responsible for developing cost effective high performance, advanced custom package solutions achieving signal integrity, thermal, structural reliability, substrate fab/package assembly design rules & project schedule requirements. •2.5D & 3D is cutting edge package technology with BRCM’s needs pushing the technology limits. Job Scope (Advanced Package Technology Engineer) –Provide deeper expertise in 2.5D / 3D technology; current and future customer engagement on technology needs & updates, consolidation of requirements and drive towards unified solution. –Lead in identification, development & qualification; program management with external assembly partners –Lead in memory supplier(s) engagement to define technology and quality requirements. –Interface with other technical teams (DI, Pkg Design, Test Dev) etc. as part of Cross Functional Team. –Support new design wins, NPI and volume ramps. –Develop alternate sourcing & qualification.

Requirements

Master's Degree in Mechanical / Electrical / Electronics Engineering with 6+ years of relevant experience in developing cost effective, high performance (speed, density, pin count, thermal & reliable), single & multi-chip, large, complex, custom & fine pitch flip chip packaging solution with advanced multi-layer ceramic / organic substrates & Interposers; Standard & thermally enhanced fine pitch leaded & BGA wire bond & wafer level packaging solution; or PhD with 10+ years of relevant experience
4~6 years Hands On experience in 2.5D / 3D Development
In-depth Know-how of Advanced Silicon fab, Bump, Interposer, substrate & assembly processes, materials & supplier selection, BOM definition, thermal and mechanical interactions.
Sound knowledge of & hands on experience in advanced, prevailing and emerging silicon, package & substrate technologies, bumping and assembly processes, design rules, failure analysis tools and techniques, materials and equipment, applicable industry standards, regulations & quality systems.
Good team player with project management, analytical, problem-solving and interpersonal skills. Must be self-driven, flexible and agile, result oriented individual. Ability to develop concepts into structured projects, generate new and innovative solutions to complex problems and handle multiple programs concurrently.
Hands-on experience of use of modelling (Thermal & Mechanical) & Sub / PCB Design CAD tools (APD, AutoCAD, Solidworks etc) for design optimization.
Sound knowledge of advanced node silicon fabrication, PCB technologies and board assembly processes, applicable industry standards, quality systems and regulations.
Communicate extensively with internal and external team members, customers in various global locations and may require travel from time to time.

Responsibilities

Provide deeper expertise in 2.5D / 3D technology; current and future customer engagement on technology needs & updates, consolidation of requirements and drive towards unified solution.
Lead in identification, development & qualification; program management with external assembly partners
Lead in memory supplier(s) engagement to define technology and quality requirements.
Interface with other technical teams (DI, Pkg Design, Test Dev) etc. as part of Cross Functional Team.
Support new design wins, NPI and volume ramps.
Develop alternate sourcing & qualification.

Benefits

Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
company paid holidays
paid sick leave and vacation time
The company follows all applicable laws for Paid Family Leave and other leaves of absence.

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