Verification Engineer - Networking
About The Position
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are currently looking for Verification Engineer who will be involved in all aspects of AMD's next generation Data Center network products. This includes verifying designs using the latest UVM standard and developing comprehensive test plans to ensure coverage closure. The position allows exposure to all aspect of ASIC design stages. Our products are aimed at making Data Center Networking solutions more effective. This is a highly strategic and important part of AMD’s business, targeting a set of customers that includes the most successful internet and cloud companies in the world. Successful candidate will work alongside an experienced design and architecture teams and will thus have enormous opportunities for learning and self-development. The position is likely to require some travel. THE PERSON: Creative innovator and thinker who loves technical problems and detail-oriented tasks Exhibits relentless commitment to help the team meet quality and development goals on schedule with high quality Drives to learn and perform at their highest potential in a technical capacity Thrives in both a team environment and in individual contribution. Able to lead a small team of engineers working towards a common objective Able to learn independently and acquire new skills required for the job Communicates openly and clearly in meetings, presentations, emails, and reports
Requirements
- Proficient in IP level ASIC verification
- Proficient in debugging firmware and RTL code using simulation tools
- Proficient in developing UVM/SV testbenches
- Experienced with Verilog, System Verilog, C, and C++
- Experience with PCIe and/or Ethernet protocols
- Automating workflows in a distributed compute environment.
- Exposure to simulation profile, efficiency improvement, acceleration
- Scripting language experience: Python, Ruby, Makefile, shell preferred.
Nice To Haves
- Exposure to leadership or mentorship is an asset
- Desirable assets with prior exposure to network processors.
Responsibilities
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
- Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
- Estimate the time required to write the new feature tests and any required changes to the test environment
- Build the directed and random verification tests
- Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
- Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements
Benefits
- AMD benefits at a glance.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
