Summer Intern, Foundry

Cadence SystemsSan Jose, CA
4h

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Detailed understanding of physical design automation flow and EDA tool functions. Running EDA tools in each technical area to qualify the flow automation and QA. Generating feedback for bug fixes and enhancements. Developing documentation for knowledge sharing and training. Tracking project schedules and documenting all phases of work. We’re doing work that matters. Help us solve what others can’t.

Requirements

  • Understanding of ASIC design flow.
  • Good knowledge of physical design automation flow
  • Tcl or Perl scripting
  • MS Office.
  • VLSI design experience.
  • Good trouble-shooting skills.

Nice To Haves

  • RTL design using Verilog HDL is preferred.

Responsibilities

  • Running EDA tools in each technical area to qualify the flow automation and QA.
  • Generating feedback for bug fixes and enhancements.
  • Developing documentation for knowledge sharing and training.
  • Tracking project schedules and documenting all phases of work.
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