SUBJECT-MATTER EXPERT AVIONICS ENGINEER

DCS Corporation•Dayton, OH

53d•Onsite

About The Position

Phalanx Griffon (PG) is the Air Force's open‑architecture airborne node linking warfighters to decision‑quality data at the tactical edge. As the program's Avionics Engineering SME, you will be the cornerstone technical authority for integrating the Nomad chassis, Type‑1 crypto, SATCOM apertures, and OMS/UCI software with multiple aircraft avionics suites during Major Release 2 (FY 25‑27)—ensuring airworthiness, mission effectiveness, and digital‑thread fidelity.

Requirements

Due to the sensitivity of customer related requirements, U.S. Citizenship is required.
Active TS/SCI clearance.
High School Diploma plus 20 years of experience. Must have been directly involved with avionics engineering and have focused on this technical area for over 20 years, has published work or work samples showing that they are an expert in this field, and have participated in technical presentations/roadshows/conferences as an expert in their respective field.
Expert knowledge of MIL‑STD‑1553, ARINC‑429/664, Ethernet (TSN/AFDX), VPX architectures, and timing/synchronization methods.
Demonstrated success integrating Type‑1 crypto, SATCOM/RF subsystems, and open mission systems (OMS/UCI, FACE, SOSA).
Hands‑on experience generating airworthiness artifacts and guiding systems through developmental & operational test.
Proficiency with avionics E‑CAD and MBSE tools (CAMEO/MagicDraw, Rhapsody, Altium/OrCAD).

Nice To Haves

Prior work on ABMS, CJADC2, or airborne C4ISR networking programs.
Deep familiarity with DO‑254/DO‑178C compliance, RCC 324/125‑15, and MIL‑STD‑461 EMI/EMC.
INCOSE CSEP/ESEP, DER, or USAF Test Pilot School academic credentials.
Experience integrating software‑defined radios, content routing, or SDN architectures into legacy aircraft.
Agile/SAFe certification and exposure to DevSecOps pipelines (Platform One, Rancher).

Responsibilities

Define avionics integration schemes that marry Nomad VPX hardware with platform data buses (MIL‑STD‑1553, ARINC‑429/664, Ethernet TSN) and mission computers.
Develop interface‑control documents (ICDs), signal‑flow diagrams, and timing budgets; ensure alignment with OMS/UCI messages and cross‑domain guard rules.
Lead authoring of AF Form 1067s, E‑series flight‑clearance packages, and safety‑of‑flight analyses.
Oversee DO‑254 (hardware) & DO‑178C (software) compliance artifacts where required.
Capture avionics models in SysML/CAMEO and link to requirements, verification methods, and hardware part trees.
Drive configuration‑control boards, red‑line incorporation, and model synchronization.
Specify and validate wiring harnesses, signal conditioning, and power interfaces in the Integration SIL.
Troubleshoot EMI/EMC, timing, and protocol issues; guide corrective actions through to flight‑test readiness.
Draft test cards, telemetry requirements, and Interim Authorizations To Test (IATT).
Serve as on‑board or ground avionics lead during developmental & operational flights; analyze real‑time data and coordinate anomaly resolution.
Advise Government IPT leads, platform SPOs, and OEM avionics teams; present technical status to SES/GO audiences.
Mentor mid‑level engineers, instilling open‑architecture and DevSecOps best practices in a classified environment.