Staff SoC Performance Architect

Qualcomm • Santa Clara, CA

2d

About The Position

The Qualcomm Data Center team is actively developing high-performance, energy-efficient server solutions for data center applications. They are seeking highly talented, innovative, and teamwork-oriented individuals for cutting-edge technology work. As a SoC Performance Architect, the role involves creating performance and power models for fabric NoC, DRAM controller, and IO blocks within server-class SoCs. Key responsibilities include correlating these models against RTL behavior, prototyping new ideas, and assisting in the productization of performance and power features for future SoC designs.

Requirements

• MS in Computer Science/Computer Engineering/Electrical Engineer with 3 years of experience in SoC performance/power modeling
• Strong grasp of the computer architecture fundamentals especially in the areas of interconnects, traffic QoS, distributed caches, coherency flows, DRAM controller and IO (PCIe) flows
• Proficient in C++ and Perl / Python
• Exposure to performance analysis and debug
• Ability to independently identify, troubleshoot and solve performance problems
• Bachelor's degree in Electrical Engineering, Computer Science, or related field and 4+ years of Systems Engineering or related work experience
• Master's degree in Electrical Engineering, Computer Science, or related field and 3+ years of Systems Engineering or related work experience
• PhD in Electrical Engineering, Computer Science, or related field and 2+ years of Systems Engineering or related work experience
• 2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands)

Nice To Haves

• MS in Computer Science/Computer Engineering/Electrical Engineer with 6 years of experience in CPU / SoC performance/power modeling, analysis / debug
• Expertise in one or more of these functional areas: Coherent fabrics based on the AMBA CHI / AXI protocol
• Expertise in one or more of these functional areas: Memory controller designs for LPDDR5, DDR5
• Expertise in one or more of these functional areas: IO controllers and fabric bridges for PCIe / CXL / CCIX
• Strong background in building fast, accurate SoC / CPU performance models C++
• Exposure to testing and debugging performance issues in pre- and post-silicon environments
• Demonstrable experience in productizing features that improve performance/power characteristics of a design

Responsibilities

• Develop a SoC performance/power model for blocks such as interconnect NoCs, distributed system caches, memory controllers, IO controllers
• Verify model correctness by writing unit-tests and debugging mismatches against expectations
• Identify ideas for improving the SoC’s performance/power characteristics. Prototype the idea in the performance/power model and thoroughly characterize it
• Work with architects and RTL developers to productize the improvements identified through detailed studies
• Conduct RTL performance verification. This will involve creation of verification plans and directed tests / checkers

Benefits

• competitive annual discretionary bonus program
• opportunity for annual RSU grants
• highly competitive benefits package is designed to support your success at work, at home, and at play

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Ph.D. or professional degree
• Number of Employees: 5,001-10,000 employees