Staff Silicon Design Engineer
About The Position
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are searching for a senior RTL engineer to join the DDR PHY design team. This is an exciting opportunity to be a member of the Memory IO design team responsible for defining, specifying, and implementing RTL for the next generation of high-speed DDR and inter-chip IO IP for AMD’s graphics and semi-custom products. THE PERSON: The successful candidate will possess: Excellent analytical and problem-solving skills along with attention to detail Must be a self-starter, able to drive tasks independently and efficiently to completion Strong/effective communication skills Enthusiastic team-first mentality
Requirements
- Excellent analytical and problem-solving skills along with attention to detail
- Must be a self-starter, able to drive tasks independently and efficiently to completion
- Strong/effective communication skills
- Enthusiastic team-first mentality
- Proven experience in digital design from specification to successful silicon
- Experience in industry-standard ASIC CAD tools for simulation, synthesis, STA, CDC, power estimation, etc.
- Progressive experience of 10+ years in RTL Design.
- Bachelors or Master in Electrical Engineering or similar is preferred.
Nice To Haves
- Experience in high-speed interfaces such as DDR, GDDR, HBM, and/or high-speed SERDES
- Experience in designs with multiple power domains
- Experience in designs with multiple clock domains
- Mixed signal RTL experience is a plus
- Exposure to leadership or mentorship is an asset
Responsibilities
- Analyze complex digital design problems and propose solutions.
- Microarchitectural design and RTL implementation of IP features.
- Drive/develop ASIC design flows and scripts
- Create microarchitecture specifications
- Work with the Design Verification team to ensure functional correctness
- Work with the Physical Design team to ensure proper implementation of the design
- Recommend improvements, optimization, and power saving enhancements
- Collaborate with Firmware team to develop firmware sequences and algorithms
- Support silicon bring-up and diagnostics
Benefits
- AMD benefits at a glance.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
