In this position, the individual will be responsible for designing, developing, modifying and evaluating Chip architecture and Core/Analog/Data Path circuit structures for feasibility study of high performance NAND flash, including new, most advanced 3-dimentional NAND memories. Evaluation of these circuits will be done through HSPICE, PRIMESIM and VERILOG simulations and through silicon evaluation when the silicon arrives.
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Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees