Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities. Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. Samsung Semiconductor Inc is looking for a talent that has strong background and hands-on experience on RF/Analog circuit layout design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits for wireless communication systems along with circuit designers. Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy Working with remote circuit designers to determine the chip floorplan. You need to come up with strategies to optimize the parasites, reduce area, and improve High Speed SERDES/analog performance. You need to be able to estimate schedule and come up with plan how to get things done within a dedicated time frame. You should be able to read the design document provided by the foundry and figure out how to resolve issues like latch-up and DRC. Perform custom layout using Virtuoso, and be able to get LVS/DRC clean. You should be familiar with CAD tools, including Virtuoso, Calibre LVS, DRC, SkillCad and so on. Desired to have experience on chip level design, like bump, pad, and ESD strategies. Good communication skills to discuss with circuit designer.
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Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees