Staff Engineer, Analog IC Design
About The Position
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell’s Central Engineering team is seeking a talented High-speed IC package development engineer to contribute to the development of advanced packaging technologies supporting Marvell products for data center applications and operating at data rates of 224 Gb/s and beyond. The engineer will be responsible for development of advanced package technologies interfacing with SI/PI, thermal and mechanical engineers to consider all performance tradeoffs. The engineer will work also with Operation and Reliability teams to qualify the technology and enable high-yield, high-volume manufacturing. What You Can Expect Responsible for package analysis, modelling, and characterization. Work on the latest cutting-edge networking SOCs. Analyze PCB and package substate designs using the latest software, including power delivery (AC and DC), high speed SERDES, and DDR interfaces. Work closely with the SOC IC Design Team, PCB Design Team, and Package Design Team to gather design and specification requirements and make recommendations for design improvement after analysis. Work with the Customer Engineering Team to translate specifications and reference design analysis into customer PCB recommendations. Understand the requirements of the product. Execution of 2.5D and 3D analysis of power delivery networks and signal routing. Build customer usable system models for end user simulations. Make recommendations and improvements to physical designs at the die, package, and PCB level. Correlation of physical lab measurements to simulation models to drive continuous improvement. Understand manufacturing variation and design constraints to analyze yield and product robustness.
Requirements
- Master’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or a related field and one (1) year of experience in the job offered or related occupation.
- Experience must include one (1) year with each of the following:
- Signal/Power Integrity design, or related field.
- Industry standard interfaces, specifically PCIe and DDR.
- Transmission lines, RF design, EM theory or related disciplines.
- SI software such as HFSS, SIWave, Hyperlynx, Keysight ADS, Clarity, and Sigrity.
- Simulations for memory timing analysis using Sisoft QSI and Keysight ADS.
- IR Drop and transient analysis for power distribution network (PowerDC, PowerSI, SiWave, Keysight ADS).
- High speed test equipment like VNA, Spectrum analyzers, TDR, oscilloscope.
- Programming tools like Matlab and Python used for automation.
- Package planning and optimization using Cadence integrity system Planner.
- Package substrate layout optimization and review using Cadence Allegro.
Responsibilities
- Responsible for package analysis, modelling, and characterization.
- Analyze PCB and package substate designs using the latest software, including power delivery (AC and DC), high speed SERDES, and DDR interfaces.
- Work closely with the SOC IC Design Team, PCB Design Team, and Package Design Team to gather design and specification requirements and make recommendations for design improvement after analysis.
- Work with the Customer Engineering Team to translate specifications and reference design analysis into customer PCB recommendations.
- Understand the requirements of the product.
- Execution of 2.5D and 3D analysis of power delivery networks and signal routing.
- Build customer usable system models for end user simulations.
- Make recommendations and improvements to physical designs at the die, package, and PCB level.
- Correlation of physical lab measurements to simulation models to drive continuous improvement.
- Understand manufacturing variation and design constraints to analyze yield and product robustness.
Benefits
- With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
- We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
