Sr Principal Product Engineer - Memory IP
About The Position
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. About Us Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. Our customers are the world's most innovative companies, delivering extraordinary electronic products-from chips to boards to systems-for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health. Join us and be part of a culture that values innovation, collaboration, and customer success. Position Overview Join our growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY IP products across a wide range of customers. This is a tremendous opportunity to work with an experienced team focused on the development and support of high-performance IP related to memory protocols such as DDR, LPDDR, HBM, and GDDR, and to engage with top technology companies making an impact in our world. We are seeking a Post Silicon Memory Product Engineer to support silicon bring-up, debug, and production ramp for advanced memory IP solutions. This role is critical in ensuring successful integration of Memory PHY and Controller IP into customer systems.
Requirements
- M.S. in Electrical/Computer Engineering (or similar) with 7+ years of experience, or Ph.D. with 5+ years of relevant experience.
- Strong background in post-silicon bring-up and debug.
- Experience working with DDR5/4/3, LPDDR5/4/3, HBM3/4, GDDR6/7 or similar IPs.
- Hands-on experience with lab equipment for reproducing and debugging customer issues.
- Ability to read schematics and participate in SI/PI reviews for customer board/package implementation.
- Excellent problem-solving, presentation, and communication skills.
Nice To Haves
- Exposure to STA and RTL flows would be beneficial.
- Familiarity with advanced mixed-signal verification and system simulation tools is a plus.
Responsibilities
- Serve as the primary technical contact for post-silicon bring-up and debug of Memory IP subsystems.
- Support customer SOC and system integration, including ATE deployment and production ramp.
- Collaborate with internal teams (Analog/Digital Design, DV, Program Management) to resolve technical issues.
- Participate in silicon evaluations, demos, and onsite bring-up for tier-one customers.
- Provide integration training and recommendations to customers.
- Analyze and resolve complex subsystem application or implementation issues.
- Contribute to documentation, checklists, and collateral improvements for enhanced customer experience.
Benefits
- Competitive compensation and benefits package.
- Opportunities for career growth and technical leadership.
- paid vacation and paid holidays
- 401(k) plan with employer match
- employee stock purchase plan
- a variety of medical, dental and vision plan options
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What This Job Offers
Job Type
Full-time
Career Level
Principal
Industry
Ambulatory Health Care Services
Number of Employees
5,001-10,000 employees
