Sr. Physical Design Engineer

AmazonSan Diego, CA
4d

About The Position

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. The Role: Be part of Amazon Leo’s ASIC team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in the advanced technology nodes. You will have the responsibility to develop back-end strategies and drive implementation for a set of communications chips that enable 5G-like communication between space and ground.

Requirements

  • Bachelor's degree or above in electrical engineering, computer engineering, or equivalent
  • 7+ years of experience in ASIC implementation, i.e., synthesis, STA and working with DFT, P&R for deep sub-micron nodes.
  • Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Nice To Haves

  • Master's degree or Ph.D. degree in Electrical Engineering or related field
  • 7+ years of experience in ASIC implementation.
  • Experience of working with RFA team integrating RF/Analog/Mixed signal blocks with digital top flows.
  • Strong exposure to UPF flow for low power design.
  • Experience of working in multi-site/multi-team environment.

Responsibilities

  • As the physical implementation engineer you will set up the flow for both logic and physical synthesis flow for various technology nodes.
  • Work with the ASIC design and DFT teams to understand the design and help review or create timing constraints.
  • Check the RTL design for clean synthesis run, perform STA and LEC on netlist.
  • Work with RFIC teams to make sure the top level integration of analog blocks are done properly and correct by construction, including formal connectivity checks.
  • Work with P&R teams to ensure a smooth hand off of netlists, ensure the timely execution of the P&R responsibilities by that team.
  • Participate in flow reviews of all the blocks with the P&R team to ensure that they achieve the best PPA for all blocks.

Benefits

  • health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
  • 401(k) matching
  • paid time off
  • parental leave
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