About The Position

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure highquality integration of the CPU block.

Requirements

  • You must possess the below minimum qualifications to be initially considered for this position.
  • Bachelor's degree in electrical engineering, Computer Engineering or related field with 3+ years of relevant experience, OR Master's degree Electrical Engineering, Computer Engineering or related field with 2+ years of relevant experience
  • The relevant experience would include one of the following areas: RTL and UPF design of complex microarchitectures Microarchitect for SoC or CPU features Knowledge of Clock domain and reset domain crossings, design power considerations, design clocking considerations

Nice To Haves

  • 6+ years of experience in RTL design or integration using industry EDA tools.
  • Product development and delivery on leading edge process nodes
  • Experience in Python programming language

Responsibilities

  • Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
  • Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
  • Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
  • Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
  • Documents micro architectural specs (MAS) of the CPU features being designed.
  • Supports SoC customers to ensure highquality integration of the CPU block.

Benefits

  • We offer a total compensation package that ranks among the best in the industry.
  • It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel .
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