SMTS GF Labs Design Enablement

GlobalFoundries • New York, NY

9d • $118,000 - $210,000

About The Position

About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Summary of Role: SMTS Design Enablement -We are hiring a highly motivated R&D engineer to support GF Labs design related needs ranging from layout, PDK development and research projects design enablement project management with circuit design, fabrication, and characterization experience. You will be working with an excellent multidisciplinary team from GF Labs to enable R&D

Requirements

• Bachelor’s Degree in Electrical Engineering, Microelectronics, Physics, Computer Science or equivalent.
• 8-10 years of work experience in semiconductor and/or EDA industries.
• Excellent technical problem-solving skills.
• Good attitude and interpersonal skills, tactful and works well in a team environment.
• Self-motivated, resourceful and shows initiative.
• Well organized and exhibits attention to detail.
• Travel - Up to 10%
• Fluency in English Language – written & verbal.

Nice To Haves

• Good knowledge of electronic devices and semiconductor theory.
• Experience with CAD systems in Electronics (Cadence IC, Cadence OrCAD, Protel or similar);
• Experience with scripting languages (Perl, Tcl, Bash...) is a plus
• Exposure to Cadence IC (Virtuoso Layout, Schematic or Skill programming language) is a plus
• Previous experience with Unix/Linux systems is also a plus.
• Strong written and verbal communication skills.
• Strong planning & organizational skills.

Responsibilities

• To carry out design and layout of macros to support technology development. These devices could be active or passive devices used for characterization and reliability evaluation of a technology and span GF’s technology portfolio.
• To develop mini PDK decks to support R&D needs and provide technical support on PDK related questions.
• To provide input for Design Manuals and provide design support to members of the GF Labs teams.
• Collaborate with cross-functional teams (process, device, reliability, and other design enablement teams) to support testsite and MPW tapeouts needed for GF Labs projects.
• Create and maintain mini DRC decks to enable physical design rule evaluation and verification.
• Design and implement layout Design of Experiments (DoE) and develop test structures to validate design rules on silicon.
• Collaborate with experts across GF fabs to promote sharing and learning across fabs
• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level