Signal Integrity and Power Integrity Engineer

Meta•Sunnyvale, CA

About The Position

As a Signal Integrity & Power Integrity (SI/PI) Design Engineer on Meta’s cutting-edge Wearable Product Team, you will play a pivotal role in shaping the future of wearable technology. You’ll collaborate closely with multidisciplinary teams to drive the innovation and performance of Meta’s next-generation wearable prototypes and smart glasses. In this high-impact role, you will lead system-level SI/PI design, simulation, and validation efforts—transforming concepts into industry-leading products. Your expertise will directly influence every stage of the design process, from simulation and automation development to hands-on lab validation, ensuring our devices set new standards for electromagnetic compatibility and performance.

Requirements

Bachelor’s degree in Electrical Engineering, Physics, Mathematics, or related field (or equivalent experience)
6+ years of experience in EM simulation and measurement areas
Experience and understanding of EM fundamentals and with EM simulation tools. Solid experience using Cadence Sigrity, PowerDC, PowerSI, OptimizePI, Ansys SIwave, Keysight ADS, 3D layout and Ansys HFSS
Familiarity with PCB and flex design and manufacture process
Experience delivering a product into manufacturing

Nice To Haves

Master’s in electrical engineering, Physics, Mathematics, or related field (or equivalent experience)
Experience using different instruments such as network analyzer, oscilloscope, signal generator, scope and other related test equipment to measure the eye-diagram and power ripple noise
Experience working with cross functionally on multiple projects with internal teams and external vendors
Experience working on ambiguous requirements and can create highly constrained solutions into high-volume consumer products
Experience with SI/PI design background, Proven track record of success in simulation and lab measurement experience, experience in designing and manufacturing consumer technology products

Responsibilities

Perform Signal Integrity analysis, collaborating with different engineering teams to balance system/product constraints with MIPI CPHY, DPHY, MPHY, PCIE, USB and high speed clocks
Perform pre-layout and post-layout simulation flow with a focus on PDN
Create simulation models and develop simulation methodology for SIPI design
Stackup review and layer assignment for High speed and PDN
Lead SIPI validation methodology and develop detailed engineering test plans
Validate PDN impedance in lab to correlate simulation results and improve design flow
Use simulation and lab data to support design troubleshooting and propose corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems
Analyze chip/package/PCB PDNs and make design trade-offs and negotiate power budgets
Provide design specifications and guidelines with clear risk tradeoffs to our cross-functional partners
Explore various design elements including different sensors, modules, memories, low/high speed buses, cables, connectors, flexible and rigid PCBs (FLEX), their physics of operation, and impacts on system performance
Provide system SI design guidance and perform post-layout review and optimization
Work closely with silicon team, EE design team and PCB layout team to optimize SI design based on the simulation data
Use simulation and lab data to support design troubleshooting and propose corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems
Generate simulation reports based on the data and communicate with Cross-functional teams with clear SI recommendations