Senior Video Design Engineer

Qualcomm • San Diego, CA

4d

About The Position

The Multimedia Video Hardware Design team at Qualcomm develops advanced IP cores supporting leading video codec standards. Key responsibilities include: Implementing video codec standards (H.264, H.265, H.266, VP9, AV1) Collaborating across hardware, systems, and firmware teams to define specifications and develop IP cores Designing micro-architecture and RTL to meet performance, area, and power requirements Reviewing linting, synthesis, CLP, CDC, and DV coverage reports Maintaining comprehensive design documentation Supporting post-silicon debug Communicating effectively and managing multiple tasks Principal duties: RTL implementation using Verilog/SystemVerilog Design optimization for power, performance, area, and timing Partnering with verification teams for functional and gate-level verification

Requirements

• Experience in multimedia hardware development (imaging, video, display, audio)
• Knowledge of SoC bus, interconnect, and memory technologies
• MS degree with 3+ years in multimedia architecture, video codec standards, VLSI design, and verification
• Proficiency in Verilog/SystemVerilog, C/C++, SystemC
• Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• Master's degree in Computer or Electrical Engineering, Computer Science, or related field and 1+ year of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• PhD in Computer or Electrical Engineering, Computer Science, or related field.

Responsibilities

• Implementing video codec standards (H.264, H.265, H.266, VP9, AV1)
• Collaborating across hardware, systems, and firmware teams to define specifications and develop IP cores
• Designing micro-architecture and RTL to meet performance, area, and power requirements
• Reviewing linting, synthesis, CLP, CDC, and DV coverage reports
• Maintaining comprehensive design documentation
• Supporting post-silicon debug
• Communicating effectively and managing multiple tasks
• RTL implementation using Verilog/SystemVerilog
• Design optimization for power, performance, area, and timing
• Partnering with verification teams for functional and gate-level verification

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Number of Employees: 5,001-10,000 employees