Senior Technical Staff Engineer- Verification

Microchip Technology Inc.Chandler, AZ
4d$91,000 - $232,000

About The Position

We are seeking a highly skilled and experienced Design Verification Engineer to join our team in developing cutting-edge machine learning acceleration solutions for edge computing. This role involves developing and verifying next-generation AI/ML acceleration hardware platforms. The ideal candidate will have a strong background in silicon hardware verification from system modeling to RTL to GDSII, with experience in microcontroller and neural processor unit subsystem verification in embedded systems. Join our team and be a part of the fast-growing, cutting-edge technology!

Requirements

  • Bachelors in ECE/EE/CS or related specializations with 15+ years of industry experience in IP/SoC verification
  • Expertise in System Verilog, UVM, Embedded C, and scripting (Python or similar)
  • Expertise in digital design fundamentals and ability to debug complex designs at RTL and Gate level
  • Familiarity with power aware verification flows advanced low power techniques and tools such as UPF/CPF and power aware verification
  • Experience providing technical leadership within a cross functional design/verification team
  • Ability to collaborate on setting and achieving team goals
  • Experience supporting transparent project management throughout the new product development lifecycle
  • Excellent written and verbal communication skills with the ability to present and convey complex ideas

Nice To Haves

  • Masters in ECE/EE/CS or related specializations
  • Good understanding of NPU/GPU acceleration, hardware acceleration techniques, and edge computing applications.
  • Experience and knowledge of FPGA architectures and implementation of RTL designs in FPGA systems.
  • Familiar with management systems such as Polarion and Atlassian (Jira, Confluence) tool suites.
  • Knowledge of security and privacy considerations in edge computing and cyber security development/analysis methods using ISO-21434 workflow requirements.
  • Understanding of Functional Safety Development and analysis methods using ISO-26262 workflow requirements.

Responsibilities

  • Hands-on system-level and block-level verification of designs targeting FPGA platforms and production ICs
  • Development of test plans, coverage plans, and verification project schedules.
  • Define and lead development of System Verilog/UVM verification environments to achieve functional verification goals
  • Understand the system level use cases and develop comprehensive SoC level verification plan based on product specification
  • Track and report overall progress of the team driving simulation debug at RTL, power aware(UPF) and gate level simulations (GLS)
  • Review all technical deliverables from team members and guide team members to meet quality and the schedule
  • Support debug/analysis of Post Silicon issues with validation, applications, design, and test teams

Benefits

  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.
  • Benefits of working at Microchip
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