Senior System Level Test Engineer

NVIDIASanta Clara, CA
21h

About The Position

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for a Senior System Level Test Engineer. NVIDIA is seeking Senior System Level Test Engineer to implement the world’s leading SoC's, GPU's and ASIC's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing!

Requirements

  • MS/PhD in Electrical Engineering, Computer Science or Computer Engineering (or equivalent experience)
  • 12+ years of experience in Systems level test, systems validation, and/or bench testing
  • Experience in new silicon bring up at the system level
  • Experience in driving SLT testing and deployment for HVM
  • Experience with testing and characterization of high power SOCs and High Speed I/Os
  • Knowledge of network topology and experience in network connectivity
  • Proficient in C#, C/C++, PERL, Python, .NET framework
  • Experience in Security provisioning and knowledge of fuse programming implementation

Responsibilities

  • Lead the design, automation, and validation of System Level Tests (SLT) for HVM (High Volume Manufacturing) for complex, high power, high speed SOCs
  • Develop and integrate test flows, scripts and automation to ensure robust SLT coverage and seamless communication between test controllers and peripherals
  • Partner with system architecture, chip design and validation teams to define and deliver production ready SLT and HVM test solutions
  • Drive custom SLT development to optimize system performance, power efficiency and test coverage
  • Oversee handler selection, enablement and hardware integration – including PCB design, socket selection, and temperature control systems
  • Improve manufacturing test quality by enhancing test correlation, yield and reliability across NPI, HVM and RMA processes
  • Collaborate closely with OSATs on production enablement, sustaining, yield analysis and DPPM reduction initiatives
  • Support silicon qualification and reliability testing (HTOL, Burn in) at the system level
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