Senior Staff Engineer, Design Verification

Marvell Technology • Morrisville, NC

1d

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M® product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform. As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc. What You Can Expect Develop verification plans for the IP in complex designs. Analyze functional coverage metrics, code coverage and toggle coverage to ensure that verification environment exercises all aspects of the design, including statements, branches, conditions, and expression. Collaborate with design and verification teams to plan the verification strategy for the given IPs. Write block level test plans to verify the functionality of a block or subsystem. Define verification goals, scope, methodologies, and metrics for measuring effectiveness and vertical scalability. Develop UVM environments and tests which comply with Marvell coding guidelines. Create and maintain System Verilog/UVM test benches for functional verification, including testcase development, sequences, drivers, monitors, scoreboard, and verification environment. Help write scripts as needed to automate tasks. Write functional coverage items and close coverage buckets. Help to monitor regressions and triage as needed. Assist in checklist closure. Assist in mentoring Interns and junior team members.

Requirements

• Master’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or a related field and three (3) years of experience in the job offered or related occupation.
• Semiconductor ASIC design/verification methodologies and flows.
• Verilog, System Verilog, UVM.
• Programming skills including object-oriented programming.
• Digital logic design and verification.
• Device reset architecture, Device clocking, FUSE, SerDes, Ethernet, and PCIe.
• PB (Partition builder tool).
• Bash, Perl, Python, and C.
• IEEE standard ethernet protocol and AMBA/APB protocol.

Responsibilities

• Develop verification plans for the IP in complex designs.
• Analyze functional coverage metrics, code coverage and toggle coverage to ensure that verification environment exercises all aspects of the design, including statements, branches, conditions, and expression.
• Collaborate with design and verification teams to plan the verification strategy for the given IPs.
• Write block level test plans to verify the functionality of a block or subsystem.
• Define verification goals, scope, methodologies, and metrics for measuring effectiveness and vertical scalability.
• Develop UVM environments and tests which comply with Marvell coding guidelines.
• Create and maintain System Verilog/UVM test benches for functional verification, including testcase development, sequences, drivers, monitors, scoreboard, and verification environment.
• Help write scripts as needed to automate tasks.
• Write functional coverage items and close coverage buckets.
• Help to monitor regressions and triage as needed.
• Assist in checklist closure.
• Assist in mentoring Interns and junior team members.

Benefits

• With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
• We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees