Senior SOC Design Engineer - Physical Design and Integration

Intel CorporationHillsboro, OR
1dOnsite

About The Position

Do Something Wonderful! Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Who We Are Come join Intel's Client Engineering Group responsible for designing Client SOCs that make up more than half of Intel's annual revenue. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for SoC (System on Chip) Physical Design Engineer ready to research, design, develop, and test lead Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. Who You Are This role is within Intel's highly regarded Devices Development Group, headquartered in Portland, Oregon with additional sites in Penang, Malaysia, and Bangalore, India. Our bold purpose as a company is to create world-changing technology that enriches the lives of every person on earth, and this role is instrumental in furthering our mission to shape the future of technology.

Requirements

  • You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position.
  • Bachelor’s Degree in Electrical Engineering, Computer Engineering or a related field with 6+ years of relevant experience -OR- Master’s Degree in Electrical Engineering, Computer Engineering or a related field with 4+ years of relevant

Nice To Haves

  • 6+ years of experience in backend design and/or integration product development and delivery on leading edge process nodes

Responsibilities

  • SoC, clock design, and power delivery integration
  • Drive performance optimization, including co-optimization work with process teams, to create best-in-class designs.
  • Physical synthesis, place and route, and clock tree synthesis with Synopsys or Cadence tools.
  • Static timing analysis constraint understanding and generation, clock stamping, and timing closure.
  • Multiple Power Domain analysis using standard Power Formats UPF or CPF.

Benefits

  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel.
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