Senior SoC Architect, RAS Analysis and Diagnostics

NVIDIA • Austin, TX

6d

About The Position

We are now looking for a Senior Hardware Architect for our Tegra System-on-Chips (SoC)! Do you want to be a part of the Artificial Intelligence (AI) Revolution? Would you like to work with world-class systems architects to define the next generation SoC architecture for Datacenters and Autonomous Vehicles? We are looking for an exceptional SoC architect to lead the architecture and strategy for in-field diagnostic testing to detect hardware failures in our CPUs and SoCs deployed in datacenters, and drive the development, validation and optimization of such diagnostics. This position offers the opportunity to have real impact in a dynamic, technology-focused company developing state-of-the-art processor and system architectures that are at the forefront of accelerating machine learning, autonomous vehicles, high-performance computing, and edge computing applications. We have built a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. Our SoC architects excel at pushing the state of the art, while making the best engineering trade-offs.

Requirements

• MS or PhD degree in computer or electrical engineering or equivalent experience
• At least 8+ years of SoC architecture, design and/or verification experience
• Good understanding of Reliability, Availability, Serviceability (RAS) in the SoC context
• You have meaningful industry expertise in defining one or more of the following SoC architecture areas - RAS, Clocks, Resets, Debug, Automotive safety, Interconnects, Memory Controller, IO technologies, Platform integration, In-System Test.
• Hands-on design verification experience, knowledge of coverage analysis and optimization methodology.
• You are comfortable communicating and solving issues at all levels of architecture definition from micro-architecture to system level to software architecture.
• Excellent analytical, written, and verbal interpersonal skills and ability to work as part of a team.

Nice To Haves

• History of debugging hardware failures in the lab.
• Familiarity with Design for Debug, Design for Test flows.
• Past research, publications in the area RAS.
• System C or C++ development skills, Python, or relevant programming experience

Responsibilities

• Work with RAS Architects to develop architecture and methods to detect faults that develop in our SOCs deployed in datacenters and autonomous vehicles.
• Work with software, design verification and silicon validation teams to develop tests that achieve high diagnostic coverage for the design.
• Assist in Failure Analysis to debug failing parts in the field and develop screens to detect and localize failures.
• Create Hardware specifications, testplans, and architectural models in System C (where applicable).
• Planning and Executing Architectural validation plans.
• Post-Silicon production support with silicon debug and publishing of customer documentation.
• Follow Industry standards and best-practices related to RAS, debuggability and silicon testing
• Patenting novel parts of system architecture

Benefits

• Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
• The base salary range is 184,000 USD - 287,500 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5.
• You will also be eligible for equity and benefits.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Number of Employees: 5,001-10,000 employees