Senior Signal Integrity and Power Integrity Engineer

Microsoft • Redmond, WA

16d

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Silicon, Manufacturing, and Packaging Engineering (SMPE) team is instrumental in developing advanced power delivery and signaling solutions for High Performance Computing (HPC) silicon designs. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Signal Integrity and Power Integrity (SIPI) Engineer to join the team.

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Nice To Haves

• MSEE degree with 10 years’ experience in silicon packaging products development
• Experience with high-speed signal design and power integrity modelling for HPC products
• Strong foundation in advanced packaging technologies as it relates to Signal and Power integrity
• Experience with Foundry Silicon technologies, OSAT technologies and Substrate technologies
• MS degree with minimum 5+ years of experience in silicon/package/system signal integrity and power delivery
• OR: BSEE degree with minimum 10 years’ experience in silicon/package/system signal integrity and power delivery
• Strong foundation and expert in the field of Signal and Power Integrity and delivery, System design, IP design with knowledge on product development with minimum 5 years’ experience in design and electrical modelling
• Good working knowledge in the field of end-to-end system SIPI Design and Architecture
• Industry knowledge, trends and landscape of technologies to drive development across Silicon-IP, Advanced packaging, Substrate technology, Board technology and Platform design
• Excellent interpersonal skills including written and verbal communication, teamwork, negotiation, and presentation

Responsibilities

• Implementing strategies for end-to-end signal integrity design from Silicon to Package, and linking to Platform to System and Cloud
• Delivering SIPI solutions that meet the HPC demands across the entire system.
• Driving future power and signal integrity solutions for chiplet architecture with advanced packaging and advanced silicon nodes
• Designing, modeling, and simulating SI and PI for data center processors and corresponding platforms to ensure optimized performance. Performs link/electrical simulations to validate I/O performance from platform to silicon.
• Working closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers.
• Driving the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines
• Driving engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level