Senior RTL Analysis Methodology Engineer

NVIDIA • Santa Clara, CA

10d • Hybrid

About The Position

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation team. The team develops and supports static RTL verification methodologies for RTL Lint and Logical Equivalence. As part of the VLSI organization, our team defines advanced methodologies used to design and develop every NVIDIA chip. NVIDIA chips push the industry limits of technology and performance for GPU, CPU and SoC markets.

Requirements

• BS or MS in Electrical, Computer Engineering or equivalent experience with 4+ years of proven experience with tools and methodologies for ASIC design and verification.
• Knowledge of Verilog and System Verilog HDL.
• Proficiency in Python
• Debugging and problem-solving.
• Experience working with vendors to resolve problems.
• Excellent communication and collaboration skills.

Nice To Haves

• Hands-on experience with RTL, whether as a designer, verification engineer, or similar role.
• Proven experience with DevOps tools and workflows (e.g., Jenkins, GitLab, Docker) and database management systems like SQL.
• Practical experience with data analysis tools and libraries such as pandas and NumPy.
• Strong understanding of AI and machine learning concepts, frameworks, or applications.

Responsibilities

• Evaluate new EDA tools and features and advance static verification methodologies.
• Contribute to architecting and developing brand-new RTL analysis flows.
• Create new workflows for data collection, analysis, and reporting to provide methodology insights.
• Set up and maintain flow regressions and QA.
• Analyze and debug issues, build solutions or workarounds
• Act as liaison between ASIC designers and EDA vendors.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees