Senior Product Engineer

Amazon • Redmond, WA

1d

About The Position

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit
satellites that will provide low-latency, high-speed broadband connectivity to
unserved and underserved communities around the world.

Come work at Amazon!

The Role:
As Senior Semiconductor Product Engineer, you will engage with an experienced
cross-disciplinary staff to conceive, design, and manufacture innovative
semiconductor solutions for Leo’s satellite and ground terminal products. You
will work closely with internal inter-disciplinary teams and third-party
suppliers to drive key aspects of semiconductor product manufacturing, test,
qualification, and reliability to meet our customers’ needs. You must be
responsive, flexible and able to succeed within an open collaborative peer
environment.

A day in the life
Meet with design and test engineers to review design architecture and test
plans.
Review foundry PDKs and wafer level reliability reports.
Work with systems, panel and thermal teams to understand and integrate system
mission profile into ASIC characterization and qualification.
Generate detailed plots and reports on Exensio or JMP for team reviews.
Develop, present schedules for post-Si product bring-up and present status to
plan.

About the team
The product engineering team includes engineers with varied experience in the
semiconductor industry, spanning from advanced digital to complex RF SoC
products, across a variety of industries from automotive to high volume
commercial markets. The team's skillset ranges from developing qual hardware
solutions to sophisticated data analytics for product characterization and
development.

Requirements

• Bachelor's degree in Electrical Engineering or a related field
• 10+ years of experience in semiconductor product engineering, preferably in high-volume wireless SoC devices manufacturing
• Knowledge of data analysis and data analytic tools such as JMP and Exensio
• Familiarity with semiconductor qualification standards and specifications
• Up to 20% domestic or international travel required
• Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Nice To Haves

• Masters or PhD degree in Electrical / Communications Engineering or related field
• Strong technical background in either RF product development and characterization or Digital & Serdes product development and characterization
• Excellent oral and written communications skills
• Experience interfacing with suppliers and external partners
• Proficiency in statistics, data analysis and YMS products such as Exensio and JMP – scripting skills preferred
• ew product introduction, with transition from design phase, through qualification and into high volume manufacturing environment
• Conversant with failure analysis techniques such as FIB, SEM, IR, EMMI, and CSAM
• Knowledgeable with package technologies such as FCBGA, FCCSP, WLCSP, and QFN

Responsibilities

• Analyze foundry WAT data from development, corner lots and qual lots.
• Drive test program & coverage reviews with design, test and system teams.
• Collaborate with TE and outsource partner in test program development, bring-up and evaluation.
• Define char plans and corner lots, and then oversee execution of char data collection and analysis at outsource partner.
• Drive bench-ATE correlation plans and execution, and reviews with design, test, systems and DVT teams.
• Interface between outsource partner and design / test teams to identify silicon, test and design bugs, and support fixes during product bring-up.
• Drive test-time reduction by RF-DC and FT-WS correlation and reject-oriented analysis.
• Define qual plans based on evaluation of mission profile and execute to defined qual plans.
• Define test plans and limits for production lots, corners lots, and pre-/post-qualification lots based on system specs, char & qual performance, and yield & Cpk targets.
• Drive optimization of foundry process targeting to balance yield performance across all product blocks to maximize yield response
• Identify root cause and drive fixes for any failures reported during qual.
• Support product definition and alignment to system specs and mission profile.
• Drive post-silicon development of custom ICs within the silicon organization.
• Release custom ICs to production meeting quality, test coverage, performance and cost targets.
• Bench data collection and correlation to ATE to de-embed ATE results to bench systems.
• Design qual hardware and qual plan, and execute full qualification of ICs to align with system mission profile.
• Work with outside lab partners for test program bring-up and validation.
• Design corner lot plans to align with design specifications and process technology features.
• Transfer of ATE program from outside lab partners to OSATs, including running GRR assessment to validate gauge capability.

Benefits

• health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
• 401(k) matching
• paid time off
• parental leave

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level