Planet-posted 18 days ago
Full-time • Mid Level
Hybrid • San Francisco, CA
501-1,000 employees

Join a dynamic and innovative team at Planet, where you'll play a pivotal role in the design of our FPGA-based systems, which are fundamental to imaging operations of our cutting-edge satellites. This is a unique opportunity to contribute to our next generation platform by defining new modules, developing specifications, and implementing your designs. You will collaborate with electrical engineers, RF engineers, camera engineers, and firmware engineers to deliver fully validated designs before they get launched into orbit. The ideal candidate is passionate about Planet's mission and thrives in a collaborative, fast-paced environment. This role will appeal to candidates who are looking for opportunities to have a large impact on new and highly visible products. This is a full-time, hybrid role which will require you to work from our San Francisco office 3 days per week.

  • Design custom FPGA-based data pipelines, DSP, and digital comms; integrate 3rd party IP; perform timing analysis and closure.
  • Verify your design in simulation and in the lab and support automated validation.
  • Collaborate with EEs and firmware engineers to develop custom hardware and software around your designs.
  • Contribute to defining FPGA architectures, selecting components, analyzing performance.
  • 6+ years of experience designing, verifying, and validating FPGA-based digital designs.
  • Expertise in writing SystemVerilog RTL.
  • Expertise in scripting and programming (Python, C++, shell).
  • Hands-on test and debugging experience with oscilloscopes and logic analyzers.
  • Advanced knowledge of version control systems (eg., git) and managing releases to production.
  • Ability to read and provide input into electrical schematics.
  • Experience in hardware / software co-design.
  • Experience with HLS and Xilinx Versal devices.
  • Experience with imaging sensor interfaces and image processing pipelines.
  • Experience with designing pipelines for AI/ML, DSP, or comms systems.
  • Experience integrating high speed serial protocols including PCIe/NVMe, MIPI, CameraLink, JESD204B, etc.
  • Comprehensive Medical, Dental, and Vision plans
  • Health Savings Account (HSA) with a company contribution
  • Generous Paid Time Off in addition to holidays and company-wide days off
  • 16 Weeks of Paid Parental Leave
  • Wellness Program and Employee Assistance Program (EAP)
  • Home Office Reimbursement
  • Monthly Phone and Internet Reimbursement
  • Tuition Reimbursement and access to LinkedIn Learning
  • Equity
  • Commuter Benefits (if local to an office)
  • Volunteering Paid Time Off
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