Senior Engineer- FPGA

AST SpaceMobile•Lanham, MD

About The Position

AST SpaceMobile is building the first and only global cellular broadband network in space to operate directly with standard, unmodified mobile devices based on our extensive IP and patent portfolio and designed for both commercial and government applications. Our engineers and space scientists are on a mission to eliminate the connectivity gaps faced by today’s five billion mobile subscribers and finally bring broadband to the billions who remain unconnected. Position Overview We are seeking a highly skilled Senior Engineer- FPGA to support test and development across radar and communications systems for the AST SpaceMobile Defense Team. The role focuses on maintaining, testing, and implementing high‑performance digital signal processing (DSP), high‑speed data paths, timing‑critical logic, and advanced waveform processing on modern FPGA platforms. You will collaborate closely with systems, RF/microwave, hardware, and software engineering teams to deliver next‑generation radar and communications capabilities that directly support the mission. In this role, you will directly influence the performance and resilience of next‑generation radar and communications systems supporting the warfighter. Your FPGA expertise will enable advanced sensing, secure data links, and high‑confidence situational awareness essential to national defense.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a closely related field.
A minimum of 10 years of FPGA development experience in radar, communications, or high‑performance DSP applications.
Strong proficiency in VHDL/Verilog and FPGA platforms such as Xilinx/AMD (Zynq, UltraScale, RFSoC) or Intel/Altera devices.
Hands‑on experience with high‑speed interfaces, DSP architectures, timing analysis, and verification workflows.
Demonstrated ability to produce customer‑ready technical documentation.
Active security clearance or the ability to obtain a U.S. security clearance

Nice To Haves

Experience supporting DoD radar or tactical communications programs.
Experience with RFSoC, multi‑channel ADC/DAC architectures, or mixed‑signal integration.
Familiarity with high‑speed switching and transceiver technologies (e.g., Xilinx GTX/GTY).
Knowledge of DO‑254, MIL‑STD frameworks, or other government design assurance standards.
Experience scripting or automating workflows in Python, MATLAB, or TCL.

Responsibilities

Design and implement FPGA logic for radar signal processing, including beamforming, pulse compression, MTI/MTD, and high‑rate data acquisition pipelines.
Develop firmware modules for software‑defined radio (SDR) and digital communications (e.g., modulation/demodulation, filtering, channelization, timing recovery, and error correction).
Implement and integrate high‑speed interfaces (SERDES, JESD204B/C, LVDS, 10/40/100G Ethernet) and custom communication links.
Create HDL testbenches and perform simulation using tools such as QuestaSim/ModelSim and Vivado.
Execute timing closure, static timing analysis, and hardware‑in‑the‑loop verification.
Integrate FPGA logic with mixed‑signal front ends, ADC/DAC interfaces, embedded processors, and high‑speed digital boards.
Support lab testing using oscilloscopes, spectrum analyzers, vector signal analyzers, and radar/communications test equipment.
Troubleshoot issues from fielded assets and perform root‑cause analysis and corrective actions.
Maintain FPGA images for build configurations and partner with DevOps for FPGA build deliveries.
Develop engineering documentation (e.g., ICDs, verification plans, test reports) that meets federal program and customer standards.